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N4219A Serial ATA Packet Analysis Probe

Status do Produto: Obsoleto | Veja opções de Serviço
Este produto não se encontra disponível

Esse produto foi substituído por um novo:

Principais recursos e especificações


  • Reliably probe 1.5 GHz SATA links
  • Capture of exact SATA activity by passive probe
  • Protocol aware triggering


The N4219A is compatible with the16700A/B, 16701A/B, and 16702A/B logic analysis mainframes and16715/16/17/18/19A or 16740/41/42A or 16750/51/52A/B or 16753/54/55/56A logic analysis modules. The N4219A requires logic analyzer operating software version 2.70 or higher. The N4219A requires a N4218A SATA interposer to connect to the SATA 1.5Gbit/s link.

The N4218A SATA interposer provides differential host transmit/device receive and host receive/device transmit signals at a 20 mv level into a 50 ohm load from coax cableswith SMA connectors. The N4218A is a passive 8:1 divider ofof the SATA link. The output of the N4218A interposer iscompatible with the N4219A SATA packet analysis probe,oscilloscopes, BERTs, or spectrum analyzers capable of detecting 20 mV signal swings into 50 ohms. The N4218A can be purchased separately from the N4219A packet analysis probe.

Validate SATA Traffic

Trigger, capture, and decode SATA traffic at 1.5 Gbit/s. All fields in the SATA protocol up to the transport layer are supported in the trigger macro. The N4219A records 10b or 8b data. 16700 Series logic analysis system operating software provide packet decode.

System Level Debug

For efficient development of SATA systems, extract useful information from a crowded stream of traffic, and accurately identify and selectively record what interests you most. Setting up complex recording, triggering and filtering options is easy and powerful. Capture time-correlated measurements with other system buses or multiple nodes of the SATA link. The complex triggering capabilities of the Keysight 16700 Series enable cross-bus triggering and sequential triggering of series of packets or events. Global markers allow measurements between system buses, enabling latency measurements through system components.