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E2910A PCI Bus Exerciser

Status do Produto: Obsoleto | Veja opções de Serviço
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Principais recursos e especificações

  • Supports all PCI transactions, including reserved commands as Master or Target
  • Complete control over: Wait cycles, burst length, abort/retry, parity and error reporting.
  • PCI protocol participation from 0 to 33 MHz
  • Continuous, real-time monitoring detects protocol violations
  • Real-time test sequencer with pattern recognizer allowing triggering/branching on.
  • Software integrates logic analyzer to capture bus traffic
  • Hierarchical disassemblers for easy high-level analysis of captured traffic
  • Record, edit & replay of PCI transactions

Descrição

The E2910A PCI Bus Exerciser provides you with a powerful tool to accelerate the development of PCI devices and systems significantly, and ensure exhaustive verification at the earliest opportunity. From bring-up and debug of individual devices through integration to in-system validation, use this independent, controllable agent on the bus to: Emulate missing device traffic for concurrent development, generate protocol corner-cases & exceptions to verify thoroughly, record, replay and modify real traffic to reproduce critical cases and isolate the root cause of real problems faster.

  • Supports all PCI transactions, including reserved commands as Master or Target
  • Complete control over: Wait cycles, burst length, abort/retry, parity and error reporting.
  • PCI protocol participation from 0 to 33 MHz
  • Continuous, real-time monitoring detects protocol violations
  • Real-time test sequencer with pattern recognizer allowing triggering/branching on.
  • Software integrates logic analyzer to capture bus traffic
  • Hierarchical disassemblers for easy high-level analysis of captured traffic
  • Record, edit & replay of PCI transactions
  • Fixturing available for 32/64 Bit PCI in-system test and add-in card test