!!!!    6    0    1  987108053  V11b4                                         

! Device           : 6810
! Function         : Static RAM 3-state 128 x 8
! revision         : B.01.00
! safeguard        : med_out_mos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

sequential

vector cycle 1000n
receive delay 900n

assign    VCC            to pins   24
assign    GND            to pins   1

assign    Address        to pins   17,18,19,20,21,22,23

assign    Data           to pins   9,8,7,6,5,4,3,2
assign    Data_D0        to pins   2    !AT Added for minimum pin test.
assign    Data_D1        to pins   3    !AT Added for minimum pin test.
assign    Data_D2        to pins   4    !AT Added for minimum pin test.
assign    Data_D3        to pins   5    !AT Added for minimum pin test.
assign    Data_D4        to pins   6    !AT Added for minimum pin test.
assign    Data_D5        to pins   7    !AT Added for minimum pin test.
assign    Data_D6        to pins   8    !AT Added for minimum pin test.
assign    Data_D7        to pins   9    !AT Added for minimum pin test.

assign    Read_Write_bar        to pins   16
assign    Chip_select_0         to pins   10
assign    Chip_select_1_bar     to pins   11
assign    Chip_select_2_bar     to pins   12
assign    Chip_select_3         to pins   13
assign    Chip_select_4_bar     to pins   14
assign    Chip_select_5_bar     to pins   15
assign    Chip_selects          to pins   15,14,13,12,11,10

family    TTL

power     VCC, GND

inputs    Address, Read_Write_bar, Chip_select_0
inputs    Chip_select_1_bar, Chip_select_2_bar, Chip_select_3
inputs    Chip_select_4_bar, Chip_select_5_bar, Chip_selects

bidirectional  Data
bidirectional  Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for min. pin test.
bidirectional  Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for min. pin test.

when  Chip_selects  is  "1xxxxx" inactive    Data
when  Chip_selects  is  "x1xxxx" inactive    Data
when  Chip_selects  is  "xx0xxx" inactive    Data
when  Chip_selects  is  "xxx1xx" inactive    Data
when  Chip_selects  is  "xxxx1x" inactive    Data
when  Chip_selects  is  "xxxxx0" inactive    Data

when  Read_Write_bar  is "0"   inputs Data
when  Read_Write_bar  is "1"  outputs Data

trace Data     to Chip_selects,Address,Read_Write_bar


disable   Data   with  Chip_selects     to   "101001"
disable   Data   with  Chip_selects     to   "011001"
disable   Data   with  Chip_selects     to   "000001"
disable   Data   with  Chip_selects     to   "001101"
disable   Data   with  Chip_selects     to   "001011"
disable   Data   with  Chip_selects     to   "001000"

disable   Data   with  Read_Write_bar   to   "1"

!***************************************************************
!***************************************************************

vector   Address_memory
     set  Chip_selects        to  "101001"
     set  Read_Write_bar      to  "1"
end vector

vector   Chip_selected
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "001001"
     set  Read_Write_bar      to  "k"
end vector

vector   Chip_select_0_false
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "001000"
     set  Read_Write_bar      to  "k"
end vector

vector   Chip_select_1_bar_false
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "001011"
     set  Read_Write_bar      to  "k"
end vector

vector   Chip_select_2_bar_false
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "001101"
     set  Read_Write_bar      to  "k"
end vector

vector   Chip_select_3_false
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "000001"
     set  Read_Write_bar      to  "k"
end vector

vector   Chip_select_4_bar_false
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "011001"
     set  Read_Write_bar      to  "k"
end vector

vector   Chip_select_5_bar_false
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "101001"
     set  Read_Write_bar      to  "k"
end vector

vector   Input_Data
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "kkkkkk"
     set  Read_Write_bar      to  "0"
end vector

vector   Write_completed
          drive  Data
     set  Address             to  "kkkkkkk"
     set  Data                to  "kkkkkkkk"
     set  Chip_selects        to  "1kkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   Output_Data
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "kkkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   Data_In_00000000_CS_false
          drive  Data
     set  Data                to  "00000000"
     set  Address             to  "kkkkkkk"
     set  Chip_selects        to  "kkkkkk"
     set  Read_Write_bar      to  "0"
end vector

vector   Address_0000000
     initialize to Address_memory
     set  Address     to "0000000"
end vector

vector   Address_0000001
     initialize to Address_memory
     set  Address     to "0000001"
end vector

vector   Address_0000011
     initialize to Address_memory
     set  Address     to "0000011"
end vector

vector   Address_0000111
     initialize to Address_memory
     set  Address     to "0000111"
end vector

vector   Address_0001111
     initialize to Address_memory
     set  Address     to "0001111"
end vector

vector   Address_0011111
     initialize to Address_memory
     set  Address     to "0011111"
end vector

vector   Address_0111111
     initialize to Address_memory
     set  Address     to "0111111"
end vector

vector   Address_1111111
     initialize to Address_memory
     set  Address     to "1111111"
end vector

vector   Address_1111110
     initialize to Address_memory
     set  Address     to "1111110"
end vector

vector   Data_In_00000000
     initialize to Input_Data
          drive  Data
     set  Data            to "00000000"
end vector

vector   Data_In_00000001
     initialize to Input_Data
          drive  Data
     set  Data            to "00000001"
end vector

vector   Data_In_00000011
     initialize to Input_Data
          drive  Data
     set  Data            to "00000011"
end vector

vector   Data_In_00000111
     initialize to Input_Data
          drive  Data
     set  Data            to "00000111"
end vector

vector   Data_In_00001111
     initialize to Input_Data
          drive  Data
     set  Data            to "00001111"
end vector

vector   Data_In_00011111
     initialize to Input_Data
          drive  Data
     set  Data            to "00011111"
end vector

vector   Data_In_00111111
     initialize to Input_Data
          drive  Data
     set  Data            to "00111111"
end vector

vector   Data_In_01111111
     initialize to Input_Data
          drive  Data
     set  Data            to "01111111"
end vector

vector   Data_In_11111111
     initialize to Input_Data
          drive  Data
     set  Data            to "11111111"
end vector

vector   Read_Data_00000000
     initialize to Output_Data
          receive  Data
     set  Data            to "00000000"
end vector

vector   Read_Data_00000001
     initialize to Output_Data
          receive  Data
     set  Data            to "00000001"
end vector

vector   Read_Data_00000011
     initialize to Output_Data
          receive  Data
     set  Data            to "00000011"
end vector

vector   Read_Data_00000111
     initialize to Output_Data
          receive  Data
     set  Data            to "00000111"
end vector

vector   Read_Data_00001111
     initialize to Output_Data
          receive  Data
     set  Data            to "00001111"
end vector

vector   Read_Data_00011111
     initialize to Output_Data
          receive  Data
     set  Data            to "00011111"
end vector

vector   Read_Data_00111111
     initialize to Output_Data
          receive  Data
     set  Data            to "00111111"
end vector

vector   Read_Data_01111111
     initialize to Output_Data
          receive  Data
     set  Data            to "01111111"
end vector

vector   Read_Data_11111111
     initialize to Output_Data
          receive  Data
     set  Data            to "11111111"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector   RWb_hi_D0
          drive  Data_D0
     set  Address             to  "kkkkkkk"
     set  Data_D0             to  "k"
     set  Chip_selects        to  "1kkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   RWb_hi_D1
          drive  Data_D1
     set  Address             to  "kkkkkkk"
     set  Data_D1             to  "k"
     set  Chip_selects        to  "1kkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   RWb_hi_D2
          drive  Data_D2
     set  Address             to  "kkkkkkk"
     set  Data_D2             to  "k"
     set  Chip_selects        to  "1kkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   RWb_hi_D3
          drive  Data_D3
     set  Address             to  "kkkkkkk"
     set  Data_D3             to  "k"
     set  Chip_selects        to  "1kkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   RWb_hi_D4
          drive  Data_D4
     set  Address             to  "kkkkkkk"
     set  Data_D4             to  "k"
     set  Chip_selects        to  "1kkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   RWb_hi_D5
          drive  Data_D5
     set  Address             to  "kkkkkkk"
     set  Data_D5             to  "k"
     set  Chip_selects        to  "1kkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   RWb_hi_D6
          drive  Data_D6
     set  Address             to  "kkkkkkk"
     set  Data_D6             to  "k"
     set  Chip_selects        to  "1kkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   RWb_hi_D7
          drive  Data_D7
     set  Address             to  "kkkkkkk"
     set  Data_D7             to  "k"
     set  Chip_selects        to  "1kkkkk"
     set  Read_Write_bar      to  "1"
end vector

vector   Data_In_D0_0
     initialize to Input_Data
          drive  Data_D0
     set  Data_D0         to "0"
end vector

vector   Data_In_D0_1
     initialize to Input_Data
          drive  Data_D0
     set  Data_D0         to "1"
end vector

vector   Data_In_D1_0
     initialize to Input_Data
          drive  Data_D1
     set  Data_D1         to "0"
end vector

vector   Data_In_D1_1
     initialize to Input_Data
          drive  Data_D1
     set  Data_D1         to "1"
end vector

vector   Data_In_D2_0
     initialize to Input_Data
          drive  Data_D2
     set  Data_D2         to "0"
end vector

vector   Data_In_D2_1
     initialize to Input_Data
          drive  Data_D2
     set  Data_D2         to "1"
end vector

vector   Data_In_D3_0
     initialize to Input_Data
          drive  Data_D3
     set  Data_D3         to "0"
end vector

vector   Data_In_D3_1
     initialize to Input_Data
          drive  Data_D3
     set  Data_D3         to "1"
end vector

vector   Data_In_D4_0
     initialize to Input_Data
          drive  Data_D4
     set  Data_D4         to "0"
end vector

vector   Data_In_D4_1
     initialize to Input_Data
          drive  Data_D4
     set  Data_D4         to "1"
end vector

vector   Data_In_D5_0
     initialize to Input_Data
          drive  Data_D5
     set  Data_D5         to "0"
end vector

vector   Data_In_D5_1
     initialize to Input_Data
          drive  Data_D5
     set  Data_D5         to "1"
end vector

vector   Data_In_D6_0
     initialize to Input_Data
          drive  Data_D6
     set  Data_D6         to "0"
end vector

vector   Data_In_D6_1
     initialize to Input_Data
          drive  Data_D6
     set  Data_D6         to "1"
end vector

vector   Data_In_D7_0
     initialize to Input_Data
          drive  Data_D7
     set  Data_D7         to "0"
end vector

vector   Data_In_D7_1
     initialize to Input_Data
          drive  Data_D7
     set  Data_D7         to "1"
end vector

vector   Read_Data_D0_0
     initialize to Output_Data
          receive  Data_D0
     set  Data_D0         to "0"
end vector

vector   Read_Data_D0_1
     initialize to Output_Data
          receive  Data_D0
     set  Data_D0         to "1"
end vector

vector   Read_Data_D1_0
     initialize to Output_Data
          receive  Data_D1
     set  Data_D1         to "0"
end vector

vector   Read_Data_D1_1
     initialize to Output_Data
          receive  Data_D1
     set  Data_D1         to "1"
end vector

vector   Read_Data_D2_0
     initialize to Output_Data
          receive  Data_D2
     set  Data_D2         to "0"
end vector

vector   Read_Data_D2_1
     initialize to Output_Data
          receive  Data_D2
     set  Data_D2         to "1"
end vector

vector   Read_Data_D3_0
     initialize to Output_Data
          receive  Data_D3
     set  Data_D3         to "0"
end vector

vector   Read_Data_D3_1
     initialize to Output_Data
          receive  Data_D3
     set  Data_D3         to "1"
end vector

vector   Read_Data_D4_0
     initialize to Output_Data
          receive  Data_D4
     set  Data_D4         to "0"
end vector

vector   Read_Data_D4_1
     initialize to Output_Data
          receive  Data_D4
     set  Data_D4         to "1"
end vector

vector   Read_Data_D5_0
     initialize to Output_Data
          receive  Data_D5
     set  Data_D5         to "0"
end vector

vector   Read_Data_D5_1
     initialize to Output_Data
          receive  Data_D5
     set  Data_D5         to "1"
end vector

vector   Read_Data_D6_0
     initialize to Output_Data
          receive  Data_D6
     set  Data_D6         to "0"
end vector

vector   Read_Data_D6_1
     initialize to Output_Data
          receive  Data_D6
     set  Data_D6         to "1"
end vector

vector   Read_Data_D7_0
     initialize to Output_Data
          receive  Data_D7
     set  Data_D7         to "0"
end vector

vector   Read_Data_D7_1
     initialize to Output_Data
          receive  Data_D7
     set  Data_D7         to "1"
end vector

!*****************************************************************************
!*****************************************************************************

sub  Write_Data (Address,Data)
      execute     Address
      execute     Chip_selected
      execute     Data
      execute     Write_completed
end sub

sub  Read_Data (Address,Data)
      execute     Address
      execute     Chip_selected
      execute     Data
end sub

!AT The following subroutines have been added for a minimum pins test.
!AT Vectors in the subroutine "Write_Data" reference the entire data bus.
!AT Therefore this subroutine was copied and modified to reference only
!AT a single pin of the data bus. The subroutine "Read_Data" did not
!AT require any modification as all references to the data bus are made
!AT via a passed parameter (data). This reference can be modified in the
!AT call statement.

sub  Write_Data_Dx (Address, Data_Dx, RWb_hi_Dx)
      execute     Address
      execute     Chip_selected
      execute     Data_Dx
      execute     RWb_hi_Dx
end sub

!*****************************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit   "awaretest D0 Test"

     call Write_Data_Dx (Address_0000000, Data_In_D0_0, RWb_hi_D0)
     call Read_Data (Address_0000000, Read_Data_D0_0)

     call Write_Data_Dx (Address_0000000, Data_In_D0_1, RWb_hi_D0)
     call Read_Data (Address_0000000, Read_Data_D0_1)

end unit

unit   "awaretest D1 Test"

     call Write_Data_Dx (Address_0000000, Data_In_D1_0, RWb_hi_D1)
     call Read_Data (Address_0000000, Read_Data_D1_0)

     call Write_Data_Dx (Address_0000000, Data_In_D1_1, RWb_hi_D1)
     call Read_Data (Address_0000000, Read_Data_D1_1)

end unit

unit   "awaretest D2 Test"

     call Write_Data_Dx (Address_0000000, Data_In_D2_0, RWb_hi_D2)
     call Read_Data (Address_0000000, Read_Data_D2_0)

     call Write_Data_Dx (Address_0000000, Data_In_D2_1, RWb_hi_D2)
     call Read_Data (Address_0000000, Read_Data_D2_1)

end unit

unit   "awaretest D3 Test"

     call Write_Data_Dx (Address_0000000, Data_In_D3_0, RWb_hi_D3)
     call Read_Data (Address_0000000, Read_Data_D3_0)

     call Write_Data_Dx (Address_0000000, Data_In_D3_1, RWb_hi_D3)
     call Read_Data (Address_0000000, Read_Data_D3_1)

end unit

unit   "awaretest D4 Test"

     call Write_Data_Dx (Address_0000000, Data_In_D4_0, RWb_hi_D4)
     call Read_Data (Address_0000000, Read_Data_D4_0)

     call Write_Data_Dx (Address_0000000, Data_In_D4_1, RWb_hi_D4)
     call Read_Data (Address_0000000, Read_Data_D4_1)

end unit

unit   "awaretest D5 Test"

     call Write_Data_Dx (Address_0000000, Data_In_D5_0, RWb_hi_D5)
     call Read_Data (Address_0000000, Read_Data_D5_0)

     call Write_Data_Dx (Address_0000000, Data_In_D5_1, RWb_hi_D5)
     call Read_Data (Address_0000000, Read_Data_D5_1)

end unit

unit   "awaretest D6 Test"

     call Write_Data_Dx (Address_0000000, Data_In_D6_0, RWb_hi_D6)
     call Read_Data (Address_0000000, Read_Data_D6_0)

     call Write_Data_Dx (Address_0000000, Data_In_D6_1, RWb_hi_D6)
     call Read_Data (Address_0000000, Read_Data_D6_1)

end unit

unit   "awaretest D7 Test"

     call Write_Data_Dx (Address_0000000, Data_In_D7_0, RWb_hi_D7)
     call Read_Data (Address_0000000, Read_Data_D7_0)

     call Write_Data_Dx (Address_0000000, Data_In_D7_1, RWb_hi_D7)
     call Read_Data (Address_0000000, Read_Data_D7_1)

end unit

unit "RAM test"
     call Write_Data (Address_0000000, Data_In_00000000)
     call Write_Data (Address_0000001, Data_In_00000001)
     call Write_Data (Address_0000011, Data_In_00000011)
     call Write_Data (Address_0000111, Data_In_00000111)
     call Write_Data (Address_0001111, Data_In_00001111)
     call Write_Data (Address_0011111, Data_In_00011111)
     call Write_Data (Address_0111111, Data_In_00111111)
     call Write_Data (Address_1111111, Data_In_01111111)
     call Write_Data (Address_1111110, Data_In_11111111)
     call Read_Data (Address_0000000, Read_Data_00000000)
     call Read_Data (Address_0000001, Read_Data_00000001)
     call Read_Data (Address_0000011, Read_Data_00000011)
     call Read_Data (Address_0000111, Read_Data_00000111)
     call Read_Data (Address_0001111, Read_Data_00001111)
     call Read_Data (Address_0011111, Read_Data_00011111)
     call Read_Data (Address_0111111, Read_Data_00111111)
     call Read_Data (Address_1111111, Read_Data_01111111)
     call Read_Data (Address_1111110, Read_Data_11111111)
end unit

unit "Chip_select_0_false"
      call  Write_Data (Address_0000000,Data_In_11111111)
      execute  Address_0000000
      execute  Chip_select_0_false
      execute  Data_In_00000000_CS_false
      execute  Write_Completed
      call  Read_Data (Address_0000000,Read_Data_11111111)
end unit

unit "Chip_select_1_false"
      call  Write_Data (Address_0000000,Data_In_11111111)
      execute  Address_0000000
      execute  Chip_select_1_bar_false
      execute  Data_In_00000000_CS_false
      execute  Write_Completed
      call  Read_Data (Address_0000000,Read_Data_11111111)
end unit

unit "Chip_select_2_false"
      call  Write_Data (Address_0000000,Data_In_11111111)
      execute  Address_0000000
      execute  Chip_select_2_bar_false
      execute  Data_In_00000000_CS_false
      execute  Write_Completed
      call  Read_Data (Address_0000000,Read_Data_11111111)
end unit

unit "Chip_select_3_false"
      call  Write_Data (Address_0000000,Data_In_11111111)
      execute  Address_0000000
      execute  Chip_select_3_false
      execute  Data_In_00000000_CS_false
      execute  Write_Completed
      call  Read_Data (Address_0000000,Read_Data_11111111)
end unit

unit "Chip_select_4_false"
      call  Write_Data (Address_0000000,Data_In_11111111)
      execute  Address_0000000
      execute  Chip_select_4_bar_false
      execute  Data_In_00000000_CS_false
      execute  Write_Completed
      call  Read_Data (Address_0000000,Read_Data_11111111)
end unit

unit "Chip_select_5_false"
      call  Write_Data (Address_0000000,Data_In_11111111)
      execute  Address_0000000
      execute  Chip_select_5_bar_false
      execute  Data_In_00000000_CS_false
      execute  Write_Completed
      call  Read_Data (Address_0000000,Read_Data_11111111)
end unit

!    End of test