!!!! 6 0 1 987032177 V6494 ! Device : 4508 ! Function : Latch 3_State dual_4_bit ! revision : B.01.00 ! safeguard : standard_cmos ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." sequential warning "Pull-ups are required to test high-impedance outputs." vector cycle 1u receive delay 900n assign VDD to pins 24 assign VSS to pins 12 assign E1_Reset to pins 1 assign E1_Strobe to pins 2 assign E1_Disable to pins 3 assign E1_Data_In to pins 10,8,6,4 assign E1_Data_In_D0 to pins 4 !AT Added for minimum pin test. assign E1_Data_In_D1 to pins 6 !AT Added for minimum pin test. assign E1_Data_In_D2 to pins 8 !AT Added for minimum pin test. assign E1_Data_In_D3 to pins 10 !AT Added for minimum pin test. assign E1_Data_Out to pins 11,9,7,5 assign E1_Data_Out_D0 to pins 5 !AT Added for minimum pin test. assign E1_Data_Out_D1 to pins 7 !AT Added for minimum pin test. assign E1_Data_Out_D2 to pins 9 !AT Added for minimum pin test. assign E1_Data_Out_D3 to pins 11 !AT Added for minimum pin test. assign E2_Reset to pins 13 assign E2_Strobe to pins 14 assign E2_Disable to pins 15 assign E2_Data_In to pins 22,20,18,16 assign E2_Data_In_D0 to pins 16 !AT Added for minimum pin test. assign E2_Data_In_D1 to pins 18 !AT Added for minimum pin test. assign E2_Data_In_D2 to pins 20 !AT Added for minimum pin test. assign E2_Data_In_D3 to pins 22 !AT Added for minimum pin test. assign E2_Data_Out to pins 23,21,19,17 assign E2_Data_Out_D0 to pins 17 !AT Added for minimum pin test. assign E2_Data_Out_D1 to pins 19 !AT Added for minimum pin test. assign E2_Data_Out_D2 to pins 21 !AT Added for minimum pin test. assign E2_Data_Out_D3 to pins 23 !AT Added for minimum pin test. power VDD, VSS family CMOS inputs E1_Reset, E1_Strobe, E1_Disable, E1_Data_In inputs E2_Reset, E2_Strobe, E2_Disable, E2_Data_In inputs E1_Data_In_D0, E1_Data_In_D1 !AT Added for minimum pin test. inputs E1_Data_In_D2, E1_Data_In_D3 !AT Added for minimum pin test. inputs E2_Data_In_D0, E2_Data_In_D1 !AT Added for minimum pin test. inputs E2_Data_In_D2, E2_Data_In_D3 !AT Added for minimum pin test. outputs E1_Data_Out, E2_Data_Out outputs E1_Data_Out_D0, E1_Data_Out_D1 !AT Added for minimum pin test. outputs E1_Data_Out_D2, E1_Data_Out_D3 !AT Added for minimum pin test. outputs E2_Data_Out_D0, E2_Data_Out_D1 !AT Added for minimum pin test. outputs E2_Data_Out_D2, E2_Data_Out_D3 !AT Added for minimum pin test. disable E1_Data_Out with E1_Disable to "1" disable E2_Data_Out with E2_Disable to "1" when E1_Disable is "1" inactive E1_Data_Out when E2_Disable is "1" inactive E2_Data_Out trace E1_Data_Out to E1_Reset, E1_Strobe, E1_Disable, E1_Data_In trace E2_Data_Out to E2_Reset, E2_Strobe, E2_Disable, E2_Data_In !********************************************************************** !********************************************************************** vector E1_Enable_Writing set E1_Reset to "0" set E1_Disable to "0" set E1_Strobe to "1" end vector vector E1_Data_In_ZZZ0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZZZ0" end vector vector E1_Data_In_ZZZ1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZZZ1" end vector vector E1_Data_Out_XXX0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZZZK" set E1_Data_Out to "XXX0" end vector vector E1_Data_Out_XXX1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZZZK" set E1_Data_Out to "XXX1" end vector vector E1_Data_In_ZZ0Z set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZZ0Z" end vector vector E1_Data_In_ZZ1Z set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZZ1Z" end vector vector E1_Data_Out_XX0X set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZZKZ" set E1_Data_Out to "XX0X" end vector vector E1_Data_Out_XX1X set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZZKZ" set E1_Data_Out to "XX1X" end vector vector E1_Data_In_Z0ZZ set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "Z0ZZ" end vector vector E1_Data_In_Z1ZZ set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "Z1ZZ" end vector vector E1_Data_Out_X0XX set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZKZZ" set E1_Data_Out to "X0XX" end vector vector E1_Data_Out_X1XX set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "ZKZZ" set E1_Data_Out to "X1XX" end vector vector E1_Data_In_0ZZZ set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "0ZZZ" end vector vector E1_Data_In_1ZZZ set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "1ZZZ" end vector vector E1_Data_Out_0XXX set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "KZZZ" set E1_Data_Out to "0XXX" end vector vector E1_Data_Out_1XXX set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In to "KZZZ" set E1_Data_Out to "1XXX" end vector vector E1_Latch_Data__ZZZK set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "0" set E1_Data_In to "ZZZK" end vector vector E1_Latch_Data__ZZKZ set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "0" set E1_Data_In to "ZZKZ" end vector vector E1_Latch_Data__ZKZZ set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "0" set E1_Data_In to "ZKZZ" end vector vector E1_Latch_Data__KZZZ set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "0" set E1_Data_In to "KZZZ" end vector vector E1_Reset_Device set E1_Reset to "1" set E1_Disable to "0" set E1_Data_Out to "0000" end vector !************************************************************************* vector E2_Enable_Writing set E2_Reset to "0" set E2_Disable to "0" set E2_Strobe to "1" end vector vector E2_Data_In_ZZZ0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZZZ0" end vector vector E2_Data_In_ZZZ1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZZZ1" end vector vector E2_Data_Out_XXX0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZZZK" set E2_Data_Out to "XXX0" end vector vector E2_Data_Out_XXX1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZZZK" set E2_Data_Out to "XXX1" end vector vector E2_Data_In_ZZ0Z set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZZ0Z" end vector vector E2_Data_In_ZZ1Z set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZZ1Z" end vector vector E2_Data_Out_XX0X set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZZKZ" set E2_Data_Out to "XX0X" end vector vector E2_Data_Out_XX1X set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZZKZ" set E2_Data_Out to "XX1X" end vector vector E2_Data_In_Z0ZZ set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "Z0ZZ" end vector vector E2_Data_In_Z1ZZ set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "Z1ZZ" end vector vector E2_Data_Out_X0XX set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZKZZ" set E2_Data_Out to "X0XX" end vector vector E2_Data_Out_X1XX set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "ZKZZ" set E2_Data_Out to "X1XX" end vector vector E2_Data_In_0ZZZ set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "0ZZZ" end vector vector E2_Data_In_1ZZZ set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "1ZZZ" end vector vector E2_Data_Out_0XXX set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "KZZZ" set E2_Data_Out to "0XXX" end vector vector E2_Data_Out_1XXX set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In to "KZZZ" set E2_Data_Out to "1XXX" end vector vector E2_Latch_Data__ZZZK set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "0" set E2_Data_In to "ZZZK" end vector vector E2_Latch_Data__ZZKZ set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "0" set E2_Data_In to "ZZKZ" end vector vector E2_Latch_Data__ZKZZ set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "0" set E2_Data_In to "ZKZZ" end vector vector E2_Latch_Data__KZZZ set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "0" set E2_Data_In to "KZZZ" end vector vector E2_Reset_Device set E2_Reset to "1" set E2_Disable to "0" set E2_Data_Out to "0000" end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector E1_Data_In_D0_0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D0 to "0" end vector vector E1_Data_In_D0_1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D0 to "1" end vector vector E1_Data_Out_D0_0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D0 to "K" set E1_Data_Out_D0 to "0" end vector vector E1_Data_Out_D0_1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D0 to "K" set E1_Data_Out_D0 to "1" end vector vector E1_Data_In_D1_0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D1 to "0" end vector vector E1_Data_In_D1_1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D1 to "1" end vector vector E1_Data_Out_D1_0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D1 to "K" set E1_Data_Out_D1 to "0" end vector vector E1_Data_Out_D1_1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D1 to "K" set E1_Data_Out_D1 to "1" end vector vector E1_Data_In_D2_0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D2 to "0" end vector vector E1_Data_In_D2_1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D2 to "1" end vector vector E1_Data_Out_D2_0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D2 to "K" set E1_Data_Out_D2 to "0" end vector vector E1_Data_Out_D2_1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D2 to "K" set E1_Data_Out_D2 to "1" end vector vector E1_Data_In_D3_0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D3 to "0" end vector vector E1_Data_In_D3_1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D3 to "1" end vector vector E1_Data_Out_D3_0 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D3 to "K" set E1_Data_Out_D3 to "0" end vector vector E1_Data_Out_D3_1 set E1_Reset to "K" set E1_Disable to "0" set E1_Strobe to "K" set E1_Data_In_D3 to "K" set E1_Data_Out_D3 to "1" end vector vector E1_Reset_Device_Dx set E1_Reset to "1" set E1_Disable to "0" end vector !************************************************************************* vector E2_Data_In_D0_0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D0 to "0" end vector vector E2_Data_In_D0_1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D0 to "1" end vector vector E2_Data_Out_D0_0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D0 to "K" set E2_Data_Out_D0 to "0" end vector vector E2_Data_Out_D0_1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D0 to "K" set E2_Data_Out_D0 to "1" end vector vector E2_Data_In_D1_0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D1 to "0" end vector vector E2_Data_In_D1_1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D1 to "1" end vector vector E2_Data_Out_D1_0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D1 to "K" set E2_Data_Out_D1 to "0" end vector vector E2_Data_Out_D1_1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D1 to "K" set E2_Data_Out_D1 to "1" end vector vector E2_Data_In_D2_0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D2 to "0" end vector vector E2_Data_In_D2_1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D2 to "1" end vector vector E2_Data_Out_D2_0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D2 to "K" set E2_Data_Out_D2 to "0" end vector vector E2_Data_Out_D2_1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D2 to "K" set E2_Data_Out_D2 to "1" end vector vector E2_Data_In_D3_0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D3 to "0" end vector vector E2_Data_In_D3_1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D3 to "1" end vector vector E2_Data_Out_D3_0 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D3 to "K" set E2_Data_Out_D3 to "0" end vector vector E2_Data_Out_D3_1 set E2_Reset to "K" set E2_Disable to "0" set E2_Strobe to "K" set E2_Data_In_D3 to "K" set E2_Data_Out_D3 to "1" end vector vector E2_Reset_Device_Dx set E2_Reset to "1" set E2_Disable to "0" end vector !************************************************************************* !************************************************************************* !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with D0. unit "awaretest Element 1, D0 Test" execute E1_Enable_Writing execute E1_Data_In_D0_0 execute E1_Data_Out_D0_0 execute E1_Data_In_D0_1 execute E1_Data_Out_D0_1 execute E1_Reset_Device_Dx end unit unit "awaretest Element 1, D1 Test" execute E1_Enable_Writing execute E1_Data_In_D1_0 execute E1_Data_Out_D1_0 execute E1_Data_In_D1_1 execute E1_Data_Out_D1_1 execute E1_Reset_Device_Dx end unit unit "awaretest Element 1, D2 Test" execute E1_Enable_Writing execute E1_Data_In_D2_0 execute E1_Data_Out_D2_0 execute E1_Data_In_D2_1 execute E1_Data_Out_D2_1 execute E1_Reset_Device_Dx end unit unit "awaretest Element 1, D3 Test" execute E1_Enable_Writing execute E1_Data_In_D3_0 execute E1_Data_Out_D3_0 execute E1_Data_In_D3_1 execute E1_Data_Out_D3_1 execute E1_Reset_Device_Dx end unit !************************************************************************* unit "awaretest Element 2, D0 Test" execute E2_Enable_Writing execute E2_Data_In_D0_0 execute E2_Data_Out_D0_0 execute E2_Data_In_D0_1 execute E2_Data_Out_D0_1 execute E2_Reset_Device_Dx end unit unit "awaretest Element 2, D1 Test" execute E2_Enable_Writing execute E2_Data_In_D1_0 execute E2_Data_Out_D1_0 execute E2_Data_In_D1_1 execute E2_Data_Out_D1_1 execute E2_Reset_Device_Dx end unit unit "awaretest Element 2, D2 Test" execute E2_Enable_Writing execute E2_Data_In_D2_0 execute E2_Data_Out_D2_0 execute E2_Data_In_D2_1 execute E2_Data_Out_D2_1 execute E2_Reset_Device_Dx end unit unit "awaretest Element 2, D3 Test" execute E2_Enable_Writing execute E2_Data_In_D3_0 execute E2_Data_Out_D3_0 execute E2_Data_In_D3_1 execute E2_Data_Out_D3_1 execute E2_Reset_Device_Dx end unit ! Device tested as two totally separate elements. Each element is tested ! one bit at a time, so that any topological variations may be covered. unit "Element 1, latch 0 test" execute E1_Enable_Writing execute E1_Data_In_ZZZ0 execute E1_Data_Out_XXX0 execute E1_Data_In_ZZZ1 execute E1_Data_Out_XXX1 execute E1_Latch_Data__ZZZK execute E1_Data_In_ZZZ0 execute E1_Data_Out_XXX1 execute E1_Reset_Device end unit unit "Element 1, latch 1 test" execute E1_Enable_Writing execute E1_Data_In_ZZ0Z execute E1_Data_Out_XX0X execute E1_Data_In_ZZ1Z execute E1_Data_Out_XX1X execute E1_Latch_Data__ZZKZ execute E1_Data_In_ZZ0Z execute E1_Data_Out_XX1X execute E1_Reset_Device end unit unit "Element 1, latch 2 test" execute E1_Enable_Writing execute E1_Data_In_Z0ZZ execute E1_Data_Out_X0XX execute E1_Data_In_Z1ZZ execute E1_Data_Out_X1XX execute E1_Latch_Data__ZKZZ execute E1_Data_In_Z0ZZ execute E1_Data_Out_X1XX execute E1_Reset_Device end unit unit "Element 1, latch 3 test" execute E1_Enable_Writing execute E1_Data_In_0ZZZ execute E1_Data_Out_0XXX execute E1_Data_In_1ZZZ execute E1_Data_Out_1XXX execute E1_Latch_Data__KZZZ execute E1_Data_In_0ZZZ execute E1_Data_Out_1XXX execute E1_Reset_Device end unit !************************************************************************* unit "Element 2, latch 0 test" execute E2_Enable_Writing execute E2_Data_In_ZZZ0 execute E2_Data_Out_XXX0 execute E2_Data_In_ZZZ1 execute E2_Data_Out_XXX1 execute E2_Latch_Data__ZZZK execute E2_Data_In_ZZZ0 execute E2_Data_Out_XXX1 execute E2_Reset_Device end unit unit "Element 2, latch 1 test" execute E2_Enable_Writing execute E2_Data_In_ZZ0Z execute E2_Data_Out_XX0X execute E2_Data_In_ZZ1Z execute E2_Data_Out_XX1X execute E2_Latch_Data__ZZKZ execute E2_Data_In_ZZ0Z execute E2_Data_Out_XX1X execute E2_Reset_Device end unit unit "Element 2, latch 2 test" execute E2_Enable_Writing execute E2_Data_In_Z0ZZ execute E2_Data_Out_X0XX execute E2_Data_In_Z1ZZ execute E2_Data_Out_X1XX execute E2_Latch_Data__ZKZZ execute E2_Data_In_Z0ZZ execute E2_Data_Out_X1XX execute E2_Reset_Device end unit unit "Element 2, latch 3 test" execute E2_Enable_Writing execute E2_Data_In_0ZZZ execute E2_Data_Out_0XXX execute E2_Data_In_1ZZZ execute E2_Data_Out_1XXX execute E2_Latch_Data__KZZZ execute E2_Data_In_0ZZZ execute E2_Data_Out_1XXX execute E2_Reset_Device end unit ! End of Test