!!!! 6 0 1 986830530 Vb8b2 ! Device : 2064 ! Function : Static RAM 3-state 8k x 8 ! revision : B.01.00 ! safeguard : high_out_cmos ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." sequential warning "test Output Enable." vector cycle 1u receive delay 900n assign VCC to pins 28 assign GND to pins 14 assign A12_A0 to pins 2,23,21,24,25,3,4,5,6,7,8 assign A12_A0 to pins 9,10 assign IO8_IO1 to pins 19,18,17,16,15,13,12,11 assign IO1 to pins 11 !AT Added for minimum pin test. assign IO2 to pins 12 !AT Added for minimum pin test. assign IO3 to pins 13 !AT Added for minimum pin test. assign IO4 to pins 15 !AT Added for minimum pin test. assign IO5 to pins 16 !AT Added for minimum pin test. assign IO6 to pins 17 !AT Added for minimum pin test. assign IO7 to pins 18 !AT Added for minimum pin test. assign IO8 to pins 19 !AT Added for minimum pin test. assign CS2_CS1 to pins 26,20 assign WEbar to pins 27 assign OEbar to pins 22 assign NC to pins 1 family TTL power VCC,GND inputs A12_A0, CS2_CS1, WEbar, OEbar bidirectional IO8_IO1 bidirectional IO1, IO2, IO3, IO4 !AT Added for min. pin test. bidirectional IO5, IO6, IO7, IO8 !AT Added for min. pin test. nondigital NC set load on groups IO8_IO1 to pull up when CS2_CS1 is "0X" inactive IO8_IO1 when CS2_CS1 is "X1" inactive IO8_IO1 when OEbar is "1" inactive IO8_IO1 when WEbar is "0" inputs IO8_IO1 when WEbar is "1" outputs IO8_IO1 trace IO8_IO1 to A12_A0, CS2_CS1, WEbar, OEbar disable IO8_IO1 with CS2_CS1 to "0X" disable IO8_IO1 with CS2_CS1 to "X1" disable IO8_IO1 with OEbar to "1" !*************************************************************** !*************************************************************** vector Initialize set CS2_CS1 to "10" set OEbar to "0" set WEbar to "1" end vector vector End_cycle drive IO8_IO1 set IO8_IO1 to "kkkkkkkk" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "1" end vector vector Write_true drive IO8_IO1 set IO8_IO1 to "kkkkkkkk" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "0" end vector vector Add_0000000000000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000000000000" end vector vector Add_0000000000001 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000000000001" end vector vector Add_0000000000010 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000000000010" end vector vector Add_0000000000100 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000000000100" end vector vector Add_0000000001000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000000001000" end vector vector Add_0000000010000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000000010000" end vector vector Add_0000000100000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000000100000" end vector vector Add_0000001000000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000001000000" end vector vector Add_0000010000000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000010000000" end vector vector Add_0000100000000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0000100000000" end vector vector Add_0001000000000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0001000000000" end vector vector Add_0010000000000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0010000000000" end vector vector Add_0100000000000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "0100000000000" end vector vector Add_1000000000000 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "1000000000000" end vector vector Data_01010101D drive IO8_IO1 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO8_IO1 to "01010101" end vector vector Data_10101010D drive IO8_IO1 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO8_IO1 to "10101010" end vector vector Data_01010101R receive IO8_IO1 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO8_IO1 to "01010101" end vector vector Data_10101010R receive IO8_IO1 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO8_IO1 to "10101010" end vector vector Data_11111111R receive IO8_IO1 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO8_IO1 to "11111111" end vector vector OEbar_false set CS2_CS1 to "10" set WEbar to "1" set OEbar to "1" end vector vector CS1bar_true_CS2_false set CS2_CS1 to "00" set OEbar to "0" set WEbar to "1" end vector vector CS2_true_CS1bar_false set CS2_CS1 to "11" set OEbar to "0" set WEbar to "1" end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector WEb_1_IO1 drive IO1 set IO1 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "1" end vector vector WEb_1_IO2 drive IO2 set IO2 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "1" end vector vector WEb_1_IO3 drive IO3 set IO3 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "1" end vector vector WEb_1_IO4 drive IO4 set IO4 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "1" end vector vector WEb_1_IO5 drive IO5 set IO5 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "1" end vector vector WEb_1_IO6 drive IO6 set IO6 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "1" end vector vector WEb_1_IO7 drive IO7 set IO7 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "1" end vector vector WEb_1_IO8 drive IO8 set IO8 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "1" end vector vector WEb_0_IO1 drive IO1 set IO1 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "0" end vector vector WEb_0_IO2 drive IO2 set IO2 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "0" end vector vector WEb_0_IO3 drive IO3 set IO3 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "0" end vector vector WEb_0_IO4 drive IO4 set IO4 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "0" end vector vector WEb_0_IO5 drive IO5 set IO5 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "0" end vector vector WEb_0_IO6 drive IO6 set IO6 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "0" end vector vector WEb_0_IO7 drive IO7 set IO7 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "0" end vector vector WEb_0_IO8 drive IO8 set IO8 to "k" set A12_A0 to "kkkkkkkkkkkkk" set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "0" end vector vector Data_IO1_0D drive IO1 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO1 to "0" end vector vector Data_IO1_1D drive IO1 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO1 to "1" end vector vector Data_IO2_0D drive IO2 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO2 to "0" end vector vector Data_IO2_1D drive IO2 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO2 to "1" end vector vector Data_IO3_0D drive IO3 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO3 to "0" end vector vector Data_IO3_1D drive IO3 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO3 to "1" end vector vector Data_IO4_0D drive IO4 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO4 to "0" end vector vector Data_IO4_1D drive IO4 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO4 to "1" end vector vector Data_IO5_0D drive IO5 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO5 to "0" end vector vector Data_IO5_1D drive IO5 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO5 to "1" end vector vector Data_IO6_0D drive IO6 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO6 to "0" end vector vector Data_IO6_1D drive IO6 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO6 to "1" end vector vector Data_IO7_0D drive IO7 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO7 to "0" end vector vector Data_IO7_1D drive IO7 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO7 to "1" end vector vector Data_IO8_0D drive IO8 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO8 to "0" end vector vector Data_IO8_1D drive IO8 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO8 to "1" end vector vector Data_IO1_0R receive IO1 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO1 to "0" end vector vector Data_IO1_1R receive IO1 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO1 to "1" end vector vector Data_IO2_0R receive IO2 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO2 to "0" end vector vector Data_IO2_1R receive IO2 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO2 to "1" end vector vector Data_IO3_0R receive IO3 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO3 to "0" end vector vector Data_IO3_1R receive IO3 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO3 to "1" end vector vector Data_IO4_0R receive IO4 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO4 to "0" end vector vector Data_IO4_1R receive IO4 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO4 to "1" end vector vector Data_IO5_0R receive IO5 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO5 to "0" end vector vector Data_IO5_1R receive IO5 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO5 to "1" end vector vector Data_IO6_0R receive IO6 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO6 to "0" end vector vector Data_IO6_1R receive IO6 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO6 to "1" end vector vector Data_IO7_0R receive IO7 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO7 to "0" end vector vector Data_IO7_1R receive IO7 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO7 to "1" end vector vector Data_IO8_0R receive IO8 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO8 to "0" end vector vector Data_IO8_1R receive IO8 set CS2_CS1 to "kk" set OEbar to "k" set WEbar to "k" set A12_A0 to "kkkkkkkkkkkkk" set IO8 to "1" end vector !*************************************************************** !*************************************************************** sub Write_data (Add, Data) execute Add execute Data execute Write_true execute End_cycle end sub sub Read_data (Add, Data) execute Add execute Data end sub !AT The following subroutines have been added for a minimum pins test. !AT Vectors in the subroutine "Write_data" reference the entire data bus. !AT Therefore this subroutine was copied and modified to reference only !AT a single pin of the data bus. The subroutine "Read_data" did not !AT require any modification as all references to the data bus are made !AT via a passed parameter (Data). This reference can be modified in the !AT call statement. sub Write_data_Dx (Add, Data_IOx, WEb_0_IOx, WEb_1_IOx) execute Add execute Data_IOx execute WEb_0_IOx execute WEb_1_IOx end sub !**************************************************************** !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with IO1. unit "awaretest IO1 Test" execute Initialize call Write_data_Dx (Add_0000000000000, Data_IO1_0D, WEb_0_IO1, WEb_1_IO1) call Read_data (Add_0000000000000, Data_IO1_0R) call Write_data_Dx (Add_0000000000000, Data_IO1_1D, WEb_0_IO1, WEb_1_IO1) call Read_data (Add_0000000000000, Data_IO1_1R) end unit unit "awaretest IO2 Test" execute Initialize call Write_data_Dx (Add_0000000000000, Data_IO2_0D, WEb_0_IO2, WEb_1_IO2) call Read_data (Add_0000000000000, Data_IO2_0R) call Write_data_Dx (Add_0000000000000, Data_IO2_1D, WEb_0_IO2, WEb_1_IO2) call Read_data (Add_0000000000000, Data_IO2_1R) end unit unit "awaretest IO3 Test" execute Initialize call Write_data_Dx (Add_0000000000000, Data_IO3_0D, WEb_0_IO3, WEb_1_IO3) call Read_data (Add_0000000000000, Data_IO3_0R) call Write_data_Dx (Add_0000000000000, Data_IO3_1D, WEb_0_IO3, WEb_1_IO3) call Read_data (Add_0000000000000, Data_IO3_1R) end unit unit "awaretest IO4 Test" execute Initialize call Write_data_Dx (Add_0000000000000, Data_IO4_0D, WEb_0_IO4, WEb_1_IO4) call Read_data (Add_0000000000000, Data_IO4_0R) call Write_data_Dx (Add_0000000000000, Data_IO4_1D, WEb_0_IO4, WEb_1_IO4) call Read_data (Add_0000000000000, Data_IO4_1R) end unit unit "awaretest IO5 Test" execute Initialize call Write_data_Dx (Add_0000000000000, Data_IO5_0D, WEb_0_IO5, WEb_1_IO5) call Read_data (Add_0000000000000, Data_IO5_0R) call Write_data_Dx (Add_0000000000000, Data_IO5_1D, WEb_0_IO5, WEb_1_IO5) call Read_data (Add_0000000000000, Data_IO5_1R) end unit unit "awaretest IO6 Test" execute Initialize call Write_data_Dx (Add_0000000000000, Data_IO6_0D, WEb_0_IO6, WEb_1_IO6) call Read_data (Add_0000000000000, Data_IO6_0R) call Write_data_Dx (Add_0000000000000, Data_IO6_1D, WEb_0_IO6, WEb_1_IO6) call Read_data (Add_0000000000000, Data_IO6_1R) end unit unit "awaretest IO7 Test" execute Initialize call Write_data_Dx (Add_0000000000000, Data_IO7_0D, WEb_0_IO7, WEb_1_IO7) call Read_data (Add_0000000000000, Data_IO7_0R) call Write_data_Dx (Add_0000000000000, Data_IO7_1D, WEb_0_IO7, WEb_1_IO7) call Read_data (Add_0000000000000, Data_IO7_1R) end unit unit "awaretest IO8 Test" execute Initialize call Write_data_Dx (Add_0000000000000, Data_IO8_0D, WEb_0_IO8, WEb_1_IO8) call Read_data (Add_0000000000000, Data_IO8_0R) call Write_data_Dx (Add_0000000000000, Data_IO8_1D, WEb_0_IO8, WEb_1_IO8) call Read_data (Add_0000000000000, Data_IO8_1R) end unit unit "unit1, Test Address and Data pins" execute Initialize call Write_data (Add_0000000000000, Data_01010101D) call Write_data (Add_0000000000001, Data_01010101D) call Write_data (Add_0000000000010, Data_01010101D) call Write_data (Add_0000000000100, Data_01010101D) call Write_data (Add_0000000001000, Data_01010101D) call Write_data (Add_0000000010000, Data_01010101D) call Write_data (Add_0000000100000, Data_01010101D) call Write_data (Add_0000001000000, Data_01010101D) call Write_data (Add_0000010000000, Data_01010101D) call Write_data (Add_0000100000000, Data_01010101D) call Write_data (Add_0001000000000, Data_01010101D) call Write_data (Add_0010000000000, Data_01010101D) call Write_data (Add_0100000000000, Data_01010101D) call Write_data (Add_1000000000000, Data_01010101D) call Read_data (Add_0000000000000, Data_01010101R) call Write_data (Add_0000000000000, Data_10101010D) call Read_data (Add_0000000000001, Data_01010101R) call Write_data (Add_0000000000001, Data_10101010D) call Read_data (Add_0000000000010, Data_01010101R) call Write_data (Add_0000000000010, Data_10101010D) call Read_data (Add_0000000000100, Data_01010101R) call Write_data (Add_0000000000100, Data_10101010D) call Read_data (Add_0000000001000, Data_01010101R) call Write_data (Add_0000000001000, Data_10101010D) call Read_data (Add_0000000010000, Data_01010101R) call Write_data (Add_0000000010000, Data_10101010D) call Read_data (Add_0000000100000, Data_01010101R) call Write_data (Add_0000000100000, Data_10101010D) call Read_data (Add_0000001000000, Data_01010101R) call Write_data (Add_0000001000000, Data_10101010D) call Read_data (Add_0000010000000, Data_01010101R) call Write_data (Add_0000010000000, Data_10101010D) call Read_data (Add_0000100000000, Data_01010101R) call Write_data (Add_0000100000000, Data_10101010D) call Read_data (Add_0001000000000, Data_01010101R) call Write_data (Add_0001000000000, Data_10101010D) call Read_data (Add_0010000000000, Data_01010101R) call Write_data (Add_0010000000000, Data_10101010D) call Read_data (Add_0100000000000, Data_01010101R) call Write_data (Add_0100000000000, Data_10101010D) call Read_data (Add_1000000000000, Data_01010101R) call Write_data (Add_1000000000000, Data_10101010D) call Read_data (Add_0000000000000, Data_10101010R) call Read_data (Add_0000000000001, Data_10101010R) call Read_data (Add_0000000000010, Data_10101010R) call Read_data (Add_0000000000100, Data_10101010R) call Read_data (Add_0000000001000, Data_10101010R) call Read_data (Add_0000000010000, Data_10101010R) call Read_data (Add_0000000100000, Data_10101010R) call Read_data (Add_0000001000000, Data_10101010R) call Read_data (Add_0000010000000, Data_10101010R) call Read_data (Add_0000100000000, Data_10101010R) call Read_data (Add_0001000000000, Data_10101010R) call Read_data (Add_0010000000000, Data_10101010R) call Read_data (Add_0100000000000, Data_10101010R) call Read_data (Add_1000000000000, Data_10101010R) end unit unit "unit2, Test Chip Select 1" execute Initialize call Write_data (Add_0000000000000, Data_10101010D) execute CS2_true_CS1bar_false call Write_data (Add_0000000000000, Data_01010101D) execute Initialize call Read_data (Add_0000000000000, Data_10101010R) end unit unit "unit3, Test Chip Select 2" execute Initialize call Write_data (Add_0000000000000, Data_01010101D) execute CS1bar_true_CS2_false call Write_data (Add_0000000000000, Data_10101010D) execute Initialize call Read_data (Add_0000000000000, Data_01010101R) end unit unit "unit4, Test Output Enable bar" ! Uncomment the last line of this unit if pull-ups are added to ! test Output Enable call Write_data (Add_0000000000000, Data_10101010D) execute OEbar_false !! call Read_data (Add_0000000000000, Data_11111111R) end unit !End of test