U4305B Protocol Exerciser for PCI Express® 3.0

Keysight U4305B

Protocol Exerciser for PCI Express® 3.0

Data Sheet

A multi-personality test instrument for PCIe:

• PCIe root complex and card emulation
• L1 substate emulation
• LTSSM analysis
• PTC PCI-sig compliance test
• NVMe conformance
• RAS system verification
• Multi-root virtualization

One card: Multiple PCIe Test Applications

Overview

• Supports Gen1 (2.5 GT/s), Gen2 (5.0 GT/s), and Gen3 (8.0 GT/s) speeds
• x1, x2, x4, x8, or x16 link widths
• Standard height, half-length card
• Perform thorough PCIe® Link testing
• Power management testing of L0s, L1, and L1 substates.

The Keysight U4305B Exerciser can be configured to provide sub-protocol layer test and debug for legacy and next generation PCIe devices. The U4305B Exerciser for PCIe is an advanced traffic generator that can be used to send and respond to TLP, DLLP, and physical layer packets to stimulate PCIe devices and systems. The Exerciser operates in one of three modes, PCIe, MR-IOV, or SR-IOV. The capabilities of these modes can be enhanced with the purchase of additional software licenses. Specific DUT test case requirements can be written by means of the included API. U4305B is a standard height, half-length PC form factor card as described in the PCI Express specification, and fits into every system including blade servers.

The PCI Express test and debug capabilities of the U4305B is broken down into the sub-protocol layers of the specification as shown in Figure 3. By emulating a PCIe component (with or without MRIOV capabilities), the Keysight U4305B Exerciser acts as an ideal link partner by sending appropriate I/O traffic to stimulate the device under test. The device under test can be exercised under various conditions and scenarios without influencing the performance parameters of the device under test. The Keysight U4305B Exerciser can send a block of TLP requests of 32- or 64-bit memory, I/O, Configuration, or Message types as stimulus to the device under test. It can also be used to send completion packets in response to DUT’s requests.

U4305B-EX3 PCIe Gen3 Exerciser

The U4305B PCIe 3.0 exerciser provides the following:

• Standard features
• Emulate root complex or add-in-card
• Equalization and transceiver control
• Configuration space register emulation
• Emulates three device functions
• Traffic generation
• Data replay of data captured on U4301A/B PCIe analyzer
• Error simulation (CRC errors, bit errors, poison TLP, etc.)
• Protocol exerciser GUI provides a graphical control of the U4305B exerciser card
• API program control can be done through TCL, Python, C++, or C#
• Optional features
• Support up to five functions
• ECRC support
• Provides emulation of MR-IOV capable component
• Provides emulation of SR-IOV capable components
• NVMe emulation of root complex (includes conformance tests)
• NVMe emulation of end point

The built-in “Test Bench” allows user generation on automated testing of PCIe or NVMe operations. The Test Bench comes with scripts that validate the operation from ASPM or PCI-PM L1 substates. These pre-written tests exercise each state 1000 times and provide pass/fail results that report on the control register operation as well as operation of each L1 substate entry/recovery.

Additional testing can be created that utilizes any DCOM-capable language such as TCL, Python, C++, or C# to execute test and generate reports. The exerciser even has API logging that allows the user to create an automated test structure by using the interface.

The built in “Test Bench” allows user generation on automated testing of PCIe or NVMe operations. Users can utilize any DCOM-capable language such as TCL, Python, C++, or C# to execute test and generate reports.

Data captured by the U4301B PCIe analyzer can be replayed by the exerciser to emulate your device. Simple export, edit and replay tools make the process easy.