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Application Notes
Debugging Eye-Diagram Failures
The logic analyzer’s Eye Scan feature allows you to quickly identify problem signals by simultaneously viewing eye diagrams across all DRAM buses. Expand the bus to find the signal(s) impacting the eye, then conduct further parametric analysis with a scope. Eye scan provides a graphical view of the signal behavior from both horizontal and vertical scans. You may set the thresholds and sample positions to help position the logic analyzer’s setup/hold window (or sampling position) and specify the threshold voltage. This ensures that the data on high-speed buses is captured accurately – in other words, that the data is sampled when it is valid.
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