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Designing Switched-Mode Power Supplies in the High di/dt Era
Engineers building switched-mode power supplies into their systems demand lower cost, smaller size, and lighter weight. Three components dominate the design challenge: the heat sink, the inductor, and the capacitor. Traditional workflows don't work in the high di/dt era because they are blind to the spike voltages induced across layout parasitics. This paper discusses a post-layout analysis step to the workflow between the pre-layout circuit simulation and physical prototyping steps.

세미나 프리젠테이션 2018-09-20

PDF PDF 2.38 MB
Controlling Parasitic Effects
Post-layout parasitic effects that degrade performance and can cause failure — skin depth, proximity effect, spike/surge voltage (sometimes called conducted EMI), noise, ringing, oscillations, and false triggering. All physical implementations include these parasitics to some extent, and their impact is not visible with pre-layout schematic circuit simulation. You will learn how to use ADS and high-speed design techniques to verify, troubleshoot, and optimize your post-layout design.

세미나 프리젠테이션 2018-09-20

PDF PDF 3.11 MB
Understanding and Controlling Conductive EMI
High-speed switched-mode power supplies produce noise (conducted and radiated EMI) that can interfere with other electronics and degrade system performance and reliability. Also, this circuit must function correctly even in the presence of inbound interference from its environment, again both conducted and radiated. In this paper, we advocate a different approach; post-layout simulation of EMC as part of the design process.

세미나 프리젠테이션 2018-09-20

PDF PDF 6.60 MB
Establish a Robust Signal Integrity Measurement and Simulation Workflow Webcast
Establish a Robust Signal Integrity Measurement and Simulation Workflow Webcast

세미나 프리젠테이션 2018-09-13

Making Accurate Signal Integrity Measurements using a Vector Network Analyzer Webcast
Making Accurate Signal Integrity Measurements using a Vector Network Analyzer Webcast

교육 자료 2018-09-13

Designing Switched-Mode Power Supplies in the High di/dt ERA Slides
Slides from the September 6, 2018 webinar

세미나 프리젠테이션 2018-09-06

PDF PDF 4.35 MB
Signal Integrity Measurements and Network Analysis

교육 자료 2018-09-04

AEL & PDK Development in ADS Class
AEL & PDK development class in ADS Join us for a 3-day training in Gent next June 18th, 19th and 20th, 2019!

세미나

[ADS] Signal Integrity Tutorial
Course1 (09:30 ~ 17:00)

교육

[ADS] PDN Design Using PIPro
Course3 Day1(09:30 ~ 17:00)

교육

[ADS HSD] PDN Design using PIPro
Course3 (09:30 ~ 17:00)

교육

Discrete Oscillator Design Tools and Techniques Webcast
Original broadcast Sept. 16, 2010

웹캐스트 - recorded

[PE] Parasitic effects
Course1 (09:30 ~ 17:00)

교육

[ADS] SerDes Workshop
Course5 (09:30 ~ 17:00)

교육

[ADS RFMW] RF Passive Fundamental - Filter, Divider
Course1 (09:30 ~ 17:00)

교육

[ADS RFMW] IC, Package, Board를 포함한 Module Design
Course3 (09:30 ~ 17:00)

교육

[PE] Fundamental
Course1 (09:30 ~ 17:00)

교육

[ADS] Power Noise Analysis Workshop
Course6 (09:30 ~ 17:00)

교육

[ADS RFMW] RF Board Performance Tuning
Course6 (09:30 ~ 17:00)

교육

[ADS RFMW] Power Amplifier Design
Course5 (09:30 ~ 17:00)

교육

[ADS RFMW] RF Active Fundamental - Amp., Mixer, Oscillator
Course4 (09:30 ~ 17:00)

교육

[ADS] DDR Workshhop
Course2 (09:30 ~ 17:00)

교육

Build Your RF PCB to Specs and Improve Yield 10x Faster Webinar Slides
Slides from the August 23, 2018 webcast

세미나 프리젠테이션 2018-08-23

PDF PDF 3.05 MB
Part 2 - Demystifying Vias in High Speed PCB Design
Slides from the August 8, 2018 webcast

세미나 프리젠테이션 2018-08-08

PDF PDF 1.94 MB
Webcasts for Educators
Connect with Keysight and discover new ways to advance in the lab and the classroom. Join us at our webinars to learn more.

웹캐스트

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