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Digital/Embedded Systems Research

IMG - Digital/Embedded Systems Research


Digital and embedded systems developers face increasing pressure to deliver products with more features that consume less power and cost less. At the same time, the complexity of ASIC, FPGA, and embedded core processor core design has increased significantly. Moving to the next level in high-speed digital design, with sub-nanosecond edge rates and slim design margins, requires deeper understanding of the signal integrity and jitter issues.

Type Title Author
Research Collaborations In-Vitro Optically Aided Robotics Manipulation ChingSeong Tan, ChiaLoon Cheng and KokSiang Chia, Innovate Malaysia 2011 competition
Technical Articles Continuous-time equalizers improve high-speed serial links   Sanjeev Gupta, EDN, 21 April 2010
Technical Articles Selecting High Linearity MMIC Amplifiers for use with Complex Digital Waveforms  Steve Crain and Ted Heil, High Frequency Electronics, February 2010
Technical Articles Introduction and Comparison of an Alternate Methodology for Measuring Loss Tangent of PCB Laminates  Keysight Technologies, Sun Microsystems, DesignCon 2010
Technical Articles Accuracy Improvements of PDN Impedance Measurements in the Low to Middle Frequency Range Keysight Technologies, Sun Microsystems, DesignCon 2010
Research Collaborations Distributed Programming and Code Generation Environments for Time based Hard Real-Time Systems  Patricia Derler, Edward Lee, Slobodan Matic, Distributed Simulation and Real-Time Application, Proceedings of the 2008 12th IEEE/ACM International Symposium on Distributed Simulation and Real-Time Applications, Volume 00, 2008, pages 330-333
Research Collaborations High-speed Network Data Analysis using Reconfigurable Hardware (NetFPGA)  G. Adam Covington, Glen Gibb, Jad Naous, John W. Lockwood, Nick McKeown,  2009
Research Collaborations Correction of Mismatches in a Time-Interleaved Analog-to-Digital Converter in an Adaptively Equalized Digital Communication Receiver  T.-H. Tsai, P. Hurst and S. Lewis, IEEE Trans. on Circuits and Systems I, Volume 56, Issue 2, Feb 2009, pages 307-319
Research Collaborations Adaptive Semiblind Calibration of Bandwidth Mismatch for Two-Channel Time-Interleaved ADCs  P. Satarzadeh, B. C. Levy, and P. J. Hurst, IEEE Transactions on Circuits and Systems I, Volume 56, Issue 9, Sept 2009, pages 2075-2088


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