您可能感興趣的網頁。 觀看搜尋結果:

 

聯絡是德專家

數位設計和互連標準

每一代數位標準的變化,都會帶來新的產品設計風險。藉由與業界專家以及像您這樣的工程師共同合作,我們得以取得第一手資訊並順利開發產品。是德科技與業界專家持續合作發展的高速數位測試解決方案,建構於量測儀器和不同領域的專業知識之上。藉由與您分享我們最先進的量測專業知識,是德科技可協助您順利克服挑戰,並且加速推出傲視業界的產品。

是德科技 - 提供最佳洞察力,創造最佳設計

請聯絡是德科技,以便了解有關數位設計與互連解決方案的更多資訊。
 

觀看YouTube影片 

1-25 / 156

排序:
Practical Application of the InfiniiSim Waveform Transformation Toolset - Application Note 
This final paper puts together the concepts and theory already presented in the preceding papers. It presents and addresses five common problems that confront engineers.

應用手冊 2018-02-23

Using De-embedding Tools for Virtual Probing - Application Note 
Discusses using de-embedding tools to gain virtual access to difficult measurement points

應用手冊 2018-02-23

BER Measurement Using Real-Time Oscilloscope Controlled from M8070A - Application Note  
The scope of this application note is to explain the BER measurement procedure using the M8045A pattern generator and DSAZ634A oscilloscope when controlled from M8070A system software.

應用手冊 2017-12-13

PDF PDF 6.78 MB
Quickly Validate Designs for DOCSIS 3.1 Compliance - Application Brief 
This “DOCSIS 3.1 Test Solution" app brief gives insight into Keysight solutions that can be used for testing DOCSIS 3.1 transmitters, receivers and components.

應用手冊 2017-12-01

Debugging Signal Integrity and Protocol Layers on DDR Designs 
As DDR data transmission rates increase, signal integrity and clarity become critical concerns. So one of the primary challenges with DDR is debugging failures.

應用手冊 2017-12-01

PDF PDF 4.16 MB
DDR4 TdiVW/VdiVW Bit Error Rate Measurement or Understanding Bit Error Rate 
Importance of making BER measurement calculations to form a statistical measurement of total jitter to understand the design's data valid window result and design error rates.

應用手冊 2017-12-01

PDF PDF 1.76 MB
Separating Read/Write Signals for DDR DRAM and Controller Validation - Application Note 
To analyze the signal integrity of DDR signals, you need to differentiate the complex traffic on the data bus to independently analyze the signal performance for both DDR chip and memory controller.

應用手冊 2017-12-01

PDF PDF 3.37 MB
DDR Probing for Physical Layer and Functional Testing - Application Note 
Probing is the key to accessing signals and validating your designs. Although you may normally probe at signal vias or designed-in probe points, for DDR these do not always provide good signal integrity.

應用手冊 2017-12-01

PDF PDF 3.12 MB
DDR Memory Overview, Development Cycle, and Challenges - Technical Overview 
Thanks to improved manufacturing processes that have driven down costs, the technology of choice is now DDR SDRAM, short for Double Data Rate Synchronous Dynamic Random Access Memory.

應用手冊 2017-12-01

PDF PDF 1.42 MB
One Size Does NOT Fit All - Application Note 
This application note discusses the topic of “One Size Does NOT Fit All” and how test system configurations benefit from a choice of hardware form factors and software products.

應用手冊 2017-12-01

How to Test USB Power Delivery (PD) Over Type-C - Application Note 
USB Type-C power delivery creates possibilities for USB connected devices with higher, bi-directional power and power for non-USB devices with ALT mode. Learn more about verification/compliance.

應用手冊 2017-11-01

End-to-End System-Level Simulations with Repeaters for PCIe® Gen4: A How-To Guide 
DesignCon 2017 - The paper describes how to quickly and effectively evaluate the end-to-end link performance of a PCI-Express Gen-4 link involving a Root Complex, a Repeater, and an End Point.

應用手冊 2017-08-28

PDF PDF 1.44 MB
Boundary Scan DFT Guidelines for Good Chain Integrity and Test Coverage - Application Note 
This application note provides some key guidelines to enable good design for testability using boundary scan.

應用手冊 2017-07-31

PDF PDF 1.38 MB
Method of Implementation (MOI) for USB Type-C Cable/Adapter Assembly High Speed Compliance Test 
Keysight Method of Implementation (MOI) for USB Type-C to Type-C Cable, Type-C to Legacy Cable, Type-C to Legacy Adapter Assembly High Speed Compliance Test Using Keysight M937xA PXIe Multiport VNA

應用手冊 2017-02-24

PDF PDF 4.66 MB
Method of Implementation (MOI) for USB Type-C Cable Assembly Low Speed Compliance Test 
Keysight Method of Implementation (MOI) for USB Type-C to Type-C Cable Assembly Low Speed Compliance Test Using Keysight M937xA PXIe Multiport VNA

應用手冊 2017-02-24

PDF PDF 2.91 MB
Characterization of DDR4 Receiver Sensitivity Impact on Post-equalization Eye 
DesignCon 2017 - This paper explores a new approach to analyze channel jitter beyond the traditional eye mask approach.

應用手冊 2017-01-31

PDF PDF 1.75 MB
IBIS-AMI Modeling and Simulation of Link Systems using Duobinary Signaling 
DesignCon 2017 - In this paper, an extension to the IBIS AMI standard to include duobinary signal modeling and simulation is proposed.

應用手冊 2017-01-31

PDF PDF 1.67 MB
IBIS-AMI Modeling of Asynchronous High Speed Link Systems 
DesignCon 2017 - This paper proposes a modified IBIS-AMI model simulation flow for asynchronous link systems.

應用手冊 2017-01-31

PDF PDF 1.38 MB
Non-Destructive Analysis and EM Model Tuning of PCB Signal Traces using the Beatty Standard 
DesignCon 2017 - This paper shows how, using a simple resonant test structure like the Beatty standard on a PCB, it is possible to verify the as-manufactured parameters and tune the PCB simulation model.

應用手冊 2017-01-31

PDF PDF 6.02 MB
Signal Integrity Analysis and Compliance Test of PCIe Gen3 Serial Channel with IBIS-AMI 
DesignCon 2017 - In this paper, signal integrity analysis and compliance testing of a complete PCIe Gen3 channel with IBIS-AMI models is presented.

應用手冊 2017-01-31

PDF PDF 1.52 MB
Accurate Statistical-Based DDR4 Margin Estimation using SSN Induced Jitter Model 
DesignCon 2017 - This paper proposes a methodology, that improves the accuracy of DDR4 statistical simulation, by using a mask correction factor.

應用手冊 2017-01-31

PDF PDF 2.10 MB
Keysight Method of Implementation (MOI) for USB2.0 Cable-Connector Assembly Compliance Test 
Keysight Method of Implementation (MOI) for USB2.0 Cable-Connector Assembly Compliance Test Using Keysight E5071C ENA Network Analyzer Option TDR

應用手冊 2016-10-18

PDF PDF 2.25 MB
Overcoming Test Challenges of USB Type-C - Application Note 
This application note provides an introduction to the USB Type-C connector, the interface functions it provides, and test implications engineers face when integrating the connector into their designs.

應用手冊 2016-08-10

PDF PDF 3.19 MB
Simulating FPGA Power Integrity Using S-Parameter Models 
This application note describes how self-impedance (frequency) can easily be determined by simulating the frequency domain self-impedance profile of a Power Distribution Network (PDN).

應用手冊 2016-06-28

如何測試 USB Type-C Alt 模式和在此模式下執行的標準 - 應用說明 
本量測簡介主要將以 DisplayPort 作為 Alt 模式的範例應用,並集中探討相關的挑戰和解決方案。

應用手冊 2016-04-29

1 2 3 4 5 6 7 下一頁