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Double Data Rate DDR Memory

Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) is implemented in several forms today:

Keysight’s solutions for DDR memory applications are driven and supported by Keysight experts that are active in the Joint Electronic Devices Engineering Council (JEDEC). Our involvement in standards groups and their related workshops, and specification development enables Keysight to bring the right solutions to the market when our customers need them.

Regardless of the DDR generation design challenges you are facing, Keysight offers a complete solution set from electrical to protocol. Work with Keysight and gain insights for your best design.

Keysight RF and Digital Learning Center - A commitment to learning with industry experts

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Access .pdf & videos from Keysight Technologies at DesignCon 2018 
January 31 - February 1, 2018; Santa Clara Convention Center, CA

Tradeshow

 
DDR4/5 and LPDDR4/5 Protocol Analysis, Debug, and Compliance Validation Webcast  
Original broadcast July 12, 2018

Webcast - recorded

 
Getting the Most Out of DDR4 and Preparing for DDR5 Webcast 
Original broadcast April 24, 2018

Webcast - recorded

 
DesignCon 2018 Show Details 
January 31 - February 1, 2018; Santa Clara Convention Center, CA

Tradeshow

 
DesignCon 2018 Demo Details 
January 31 - February 1, 2018; Santa Clara Convention Center, CA

Tradeshow

 
DesignCon 2018 - Keysight Education Forum 
January 31 - February 1, 2018; Santa Clara Convention Center, CA

Tradeshow

 
USB Type-C Physical Layer Design Webcast 
Original broadcast November 9, 2017

Webcast - recorded

 
Physical Layer Testing of USB Type-C Products Webcast 
Original broadcast October 20, 2017

Webcast - recorded

 
Jitter Measurements and Real-Time Eye Analysis Using an Oscilloscope Webcast 
Original broadcast May 28, 2015

Webcast - recorded

 
Introducing the New Infiniium V-Series High-Performance Oscilloscope Webcast 
Original broadcast April 14, 2015

Webcast - recorded

 
Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

Webcast - recorded

 
Best practices in implementing boundary scan on limited access boards 
Original broadcast December 18, 2014

Webcast - recorded

 
Boundary Scan Webcast Series 
Live and on-demand webcasts

Webcast

 
Testing limited access SSD boards with boundary scan and external instruments webcast 
Original broadcast December 4, 2014

Webcast - recorded

 
Embedded testing of Intel Haswell and Broadwell chipsets on limited access client boards webcast 
Original broadcast November 13, 2014

Webcast - recorded

 
Testing DDR on limited access boards using boundary scan silicon nails 
Original broadcast October 30, 2014

Webcast - recorded

 
Maximizing test coverage of multiple limited access boards by linking multiple boundary scan chains 
Original broadcast October 9, 2014

Webcast - recorded

 
Extending boundary scan tests to improve test coverage of limited access boards webcast 
Original broadcast September 25, 2014

Webcast - recorded

 
Introduction to the Keysight x1149 Boundary Scan Analyzer Webcast 
Original broadcast August 26, 2014; 9am PT / 12pm ET

Webcast - recorded

 
Common DFT guidelines for implementing boundary scan on limited access boards webcast 
Original broadcast September 11, 2014

Webcast - recorded

 
Fixturing and Fixture Removal for Multiport Devices with Non-Standard RF Interfaces Webcast 
Original broadcast March 11, 2014

Webcast - recorded

 
Accelerate DDR4/LPDDR3 Memory Debug with Bus level Signal Integrity Insight Webcast 
Original broadcast March 4, 2014

Webcast - recorded

 
Tips to Debugging DDR 1, 2 and 3 Physical and Protocol Layer Issues webcast 

Training Materials 2009-01-06