!!!!    6    0    1  989290569  Vacd3                                         

! Device           : 7488
! Function         : mask_rom oc 32 x 8
! revision         : B.01.00
! safeguard        : default
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

sequential

vector cycle 2u
receive delay 1.9u

assign  VCC         to pins   16
assign  GND         to pins   8

assign  Data_outputs     to pins   9,7,6,5,4,3,2,1
assign  Data_D0          to pins   1    !AT Added for minimum pin test.
assign  Data_D1          to pins   2    !AT Added for minimum pin test.
assign  Data_D2          to pins   3    !AT Added for minimum pin test.
assign  Data_D3          to pins   4    !AT Added for minimum pin test.
assign  Data_D4          to pins   5    !AT Added for minimum pin test.
assign  Data_D5          to pins   6    !AT Added for minimum pin test.
assign  Data_D6          to pins   7    !AT Added for minimum pin test.
assign  Data_D7          to pins   9    !AT Added for minimum pin test.

assign  Address     to pins   14,13,12,11,10

assign  Select_bar  to pins   15


family    TTL

power   VCC, GND

inputs  Address, Select_bar

outputs Data_outputs
outputs Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for minimum pin test.
outputs Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for minimum pin test.

trace Data_outputs   to Address,Select_bar

disable Data_outputs     with Select_bar     to  "1"

!*********************************************************************
!*********************************************************************

 vector    Address_inputs
      set  Select_bar     to   "0"
      set  Data_outputs   to   "00000000"
      set  Address        to   "00000"
      graycounter         Address
 end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

 vector    Address_inputs_D0
      set  Select_bar     to   "0"
      set  Data_D0        to   "0"
      set  Address        to   "00000"
      graycounter         Address
 end vector

 vector    Address_inputs_D1
      set  Select_bar     to   "0"
      set  Data_D1        to   "0"
      set  Address        to   "00000"
      graycounter         Address
 end vector

 vector    Address_inputs_D2
      set  Select_bar     to   "0"
      set  Data_D2        to   "0"
      set  Address        to   "00000"
      graycounter         Address
 end vector

 vector    Address_inputs_D3
      set  Select_bar     to   "0"
      set  Data_D3        to   "0"
      set  Address        to   "00000"
      graycounter         Address
 end vector

 vector    Address_inputs_D4
      set  Select_bar     to   "0"
      set  Data_D4        to   "0"
      set  Address        to   "00000"
      graycounter         Address
 end vector

 vector    Address_inputs_D5
      set  Select_bar     to   "0"
      set  Data_D5        to   "0"
      set  Address        to   "00000"
      graycounter         Address
 end vector

 vector    Address_inputs_D6
      set  Select_bar     to   "0"
      set  Data_D6        to   "0"
      set  Address        to   "00000"
      graycounter         Address
 end vector

 vector    Address_inputs_D7
      set  Select_bar     to   "0"
      set  Data_D7        to   "0"
      set  Address        to   "00000"
      graycounter         Address
 end vector

 !*********************************************************************
 !*********************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit "awaretest D0 Test"
     preset counter Address_inputs_D0      compress
     repeat         31 times
          count     Address_inputs_D0      compress
     end repeat
end unit

unit "awaretest D1 Test"
     preset counter Address_inputs_D1      compress
     repeat         31 times
          count     Address_inputs_D1      compress
     end repeat
end unit

unit "awaretest D2 Test"
     preset counter Address_inputs_D2      compress
     repeat         31 times
          count     Address_inputs_D2      compress
     end repeat
end unit

unit "awaretest D3 Test"
     preset counter Address_inputs_D3      compress
     repeat         31 times
          count     Address_inputs_D3      compress
     end repeat
end unit

unit "awaretest D4 Test"
     preset counter Address_inputs_D4      compress
     repeat         31 times
          count     Address_inputs_D4      compress
     end repeat
end unit

unit "awaretest D5 Test"
     preset counter Address_inputs_D5      compress
     repeat         31 times
          count     Address_inputs_D5      compress
     end repeat
end unit

unit "awaretest D6 Test"
     preset counter Address_inputs_D6      compress
     repeat         31 times
          count     Address_inputs_D6      compress
     end repeat
end unit

unit "awaretest D7 Test"
     preset counter Address_inputs_D7      compress
     repeat         31 times
          count     Address_inputs_D7      compress
     end repeat
end unit

 unit "test device 7488"
      preset counter Address_inputs      compress
      repeat         31 times
           count     Address_inputs      compress
      end repeat
 end unit

 !    End of test