!!!!    6    0    1  991769500  V551c                                         

! Device           : 74ls670
! Function         : Register_file 4 x 4
! revision         : B.01.00
! safeguard        : high_out_lsttl
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

sequential

assign  VCC          to pins 16
assign  GND          to pins  8

assign  Write_Inputs to pins 13,14
assign  Write_Enable to pins 12

assign  Data_Inputs  to pins 3,2,1,15
assign  D4           to pins 3
assign  D3           to pins 2
assign  D2           to pins 1
assign  D1           to pins 15

assign  Read_Inputs  to pins 4,5
assign  Read_Enable  to pins 11

assign  Data_Outputs to pins 6,7,9,10
assign  Q4           to pins 6
assign  Q3           to pins 7
assign  Q2           to pins 9
assign  Q1           to pins 10

power  VCC, GND

inputs  Write_Inputs, Write_Enable, Read_Inputs, Read_Enable, Data_Inputs
inputs  D4, D3, D2, D1
outputs  Data_Outputs, Q4, Q3, Q2, Q1

family   TTL

disable  Data_Outputs  with  Read_Enable  to  "1"

when Read_Enable is "1" inactive Data_Outputs

trace Q4 to D4, Write_Inputs, Write_Enable, Read_Inputs, Read_Enable
trace Q3 to D3, Write_Inputs, Write_Enable, Read_Inputs, Read_Enable
trace Q2 to D2, Write_Inputs, Write_Enable, Read_Inputs, Read_Enable
trace Q1 to D1, Write_Inputs, Write_Enable, Read_Inputs, Read_Enable
!***************************************************************************
!***************************************************************************

vector Enable_Writing
      set Write_Enable   to "0"
      set Read_Enable    to "0"
      set Read_Inputs    to "00"
end vector

vector Write_Word_0
      set Write_Enable   to "K"
      set Write_Inputs   to "00"
      set Read_Enable    to "K"
      set Read_Inputs    to "00"
end vector

vector Write_Word_1
      set Write_Enable   to "K"
      set Write_Inputs   to "01"
      set Read_Enable    to "K"
      set Read_Inputs    to "01"
end vector

vector Write_Word_2
      set Write_Enable   to "K"
      set Write_Inputs   to "10"
      set Read_Enable    to "K"
      set Read_Inputs    to "10"
end vector

vector Write_Word_3
      set Write_Enable   to "K"
      set Write_Inputs   to "11"
      set Read_Enable    to "K"
      set Read_Inputs    to "11"
end vector

vector Inputs_0001
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set Data_Inputs    to "0001"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Inputs_0010
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set Data_Inputs    to "0010"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Inputs_0100
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set Data_Inputs    to "0100"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Inputs_1000
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set Data_Inputs    to "1000"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Inputs_1110
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set Data_Inputs    to "1110"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Inputs_1101
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set Data_Inputs    to "1101"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Inputs_1011
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set Data_Inputs    to "1011"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Inputs_0111
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set Data_Inputs    to "0111"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Disable_Writing
      set Write_Enable   to "1"
      set Write_Inputs   to "KK"
      set Data_Inputs    to "KKKK"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Outputs_0001
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Data_Outputs   to "0001"
      set Data_Inputs    to "KKKK"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Outputs_0010
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Data_Outputs   to "0010"
      set Data_Inputs    to "KKKK"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Outputs_0100
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Data_Outputs   to "0100"
      set Data_Inputs    to "KKKK"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Outputs_1000
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Data_Outputs   to "1000"
      set Data_Inputs    to "KKKK"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Outputs_1110
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Data_Outputs   to "1110"
      set Data_Inputs    to "KKKK"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Outputs_1101
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Data_Outputs   to "1101"
      set Data_Inputs    to "KKKK"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Outputs_1011
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Data_Outputs   to "1011"
      set Data_Inputs    to "KKKK"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Outputs_0111
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Data_Outputs   to "0111"
      set Data_Inputs    to "KKKK"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Disable_Outputs
      set Read_Enable    to "1"
      set Read_Inputs    to "KK"
      set Data_Inputs    to "KKKK"
      set Data_Outputs   to "1111"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector D1_I_0
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set D1             to "0"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector D1_I_1
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set D1             to "1"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector D2_I_0
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set D2             to "0"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector D2_I_1
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set D2             to "1"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector D3_I_0
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set D3             to "0"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector D3_I_1
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set D3             to "1"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector D4_I_0
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set D4             to "0"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector D4_I_1
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
      set D4             to "1"
      set Read_Enable    to "K"
      set Read_Inputs    to "KK"
end vector

vector Q1_O_0
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Q1             to "0"
      set D1             to "K"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Q1_O_1
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Q1             to "1"
      set D1             to "K"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Q2_O_0
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Q2             to "0"
      set D2             to "K"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Q2_O_1
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Q2             to "1"
      set D2             to "K"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Q3_O_0
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Q3             to "0"
      set D3             to "K"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Q3_O_1
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Q3             to "1"
      set D3             to "K"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Q4_O_0
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Q4             to "0"
      set D4             to "K"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

vector Q4_O_1
      set Read_Enable    to "0"
      set Read_Inputs    to "KK"
      set Q4             to "1"
      set D4             to "K"
      set Write_Enable   to "K"
      set Write_Inputs   to "KK"
end vector

!***************************************************************************
!***************************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D1, Q1.

unit "awaretest D1 Q1 Test"
      execute Enable_Writing
      execute Write_Word_0
      execute D1_I_0
      execute Q1_O_0

      execute Enable_Writing
      execute Write_Word_0
      execute D1_I_1
      execute Q1_O_1
end unit

unit "awaretest D2 Q2 Test"
      execute Enable_Writing
      execute Write_Word_1
      execute D2_I_0
      execute Q2_O_0

      execute Enable_Writing
      execute Write_Word_1
      execute D2_I_1
      execute Q2_O_1
end unit

unit "awaretest D3 Q3 Test"
      execute Enable_Writing
      execute Write_Word_2
      execute D3_I_0
      execute Q3_O_0

      execute Enable_Writing
      execute Write_Word_2
      execute D3_I_1
      execute Q3_O_1
end unit

unit "awaretest D4 Q4 Test"
      execute Enable_Writing
      execute Write_Word_3
      execute D4_I_0
      execute Q4_O_0

      execute Enable_Writing
      execute Write_Word_3
      execute D4_I_1
      execute Q4_O_1
end unit

!****************************************************************

unit   "Register file test, word 0"

      execute Enable_Writing
      execute Write_Word_0
      execute Inputs_0001

      execute Disable_Writing
      execute Write_Word_0
      execute Inputs_1000
      execute Outputs_0001

      execute Enable_Writing

      execute Write_Word_0
      execute Inputs_1110
      execute Outputs_1110

end unit

unit   "Register file test, word 1"

      execute Enable_Writing
      execute Write_Word_1
      execute Inputs_0010

      execute Disable_Writing
      execute Write_Word_1
      execute Inputs_1101
      execute Outputs_0010

      execute Enable_Writing

      execute Write_Word_1
      execute Inputs_1101
      execute Outputs_1101

end unit

unit   "Register file test, word 2"

      execute Enable_Writing
      execute Write_Word_2
      execute Inputs_0100

      execute Disable_Writing
      execute Write_Word_2
      execute Inputs_1011
      execute Outputs_0100

      execute Enable_Writing

      execute Write_Word_2
      execute Inputs_1011
      execute Outputs_1011

end unit

unit   "Register file test, word 3"

      execute Enable_Writing
      execute Write_Word_3
      execute Inputs_1000

      execute Disable_Writing
      execute Write_Word_3
      execute Inputs_0111
      execute Outputs_1000

      execute Enable_Writing

      execute Write_Word_3
      execute Inputs_0111
      execute Outputs_0111

end unit

!     End of Test