P5551PRAS PCI Express RAS

Introduction

RAS is an engineering term in computing that describes the robustness of server systems and mainframe computers.  A computer build with high levels of RAS is more fault-tolerant, self-correcting when it discovers corrupted data and quick and easy to repair without disrupting operations. The concept of RAS is not confined to the computer hardware, but applies to the full system architecture, including e.g., protocol layers, BIOS, drivers and the operating system. 

Product Overview

The Keysight PCIe 5.0 RAS test solution, together with the PCIe 5.0 Protocol Exerciser offers a complete RAS testing solution and platform in terms of Reliability, Availability and Serviceability validation.

Reliability indicates the probability that a system or software will produce accurate/correct results consistently, according to its specifications.  Vendors can enhance reliability by adding features that help detect and repair problems in their products and adding failover mechanisms.

Availability indicates the probability that a system or software will be operational at any given time. Features that allow a system to function even when problems occur, instead of crashing, will enhance the product’s availability.

Serviceability refers to the ease and speed with which a system can be fixed or maintained without disrupting operations.

Keysight’s PCIe 5.0 RAS test solution, combined with Keysight’s P5551A PCIe 5.0 Protocol Exerciser, completes the only RAS test solution available for PCIe 5.0 in the market.

PCIe 5.0 RAS Injection Tool

The PCIe 5.0 RAS test solution is based on the P5551 PCIe 5.0 Protocol Exerciser that allows to generate complex PCIe error injection scenarios. To stress and validate the RAS features implemented in the system under test (SUT), the PCIE 5.0 protocol exerciser is plugged into a free PCIe slot in the SUT and connected via USB to the control PC running the exerciser firmware and PCIe 5.0 RAS test solution.

The RAS test solution provides an easy-to-use GUI with one-click operations to connect to the PCIe exerciser and configure the exerciser as PCIe endpoint (EP) device using the selected link settings. Finally, a large number of pre-defined PCIe error scenarios (see error categories listed below) can be injected into the SUT using single buttons.