!!!!    6    0    1  991846959  Ve512                                         

! Device           : 4034
! Function         : Shift_Storage_Register 3_State 8_Bit_bidirectional
! revision         : B.01.00
! safeguard        : standard_cmos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

 sequential

 vector cycle 2.5u
 receive delay 2.4u

assign VDD to pins 24
assign VSS to pins 12

assign Clock to pins 15
assign Data to pins 10
assign Control to pins 9,13,11,14

assign A_IO    to pins 23,22,21,20,19,18,17,16
assign A_IO0   to pins 16         !AT Added for minimum pin test.
assign A_IO1   to pins 17         !AT Added for minimum pin test.
assign A_IO2   to pins 18         !AT Added for minimum pin test.
assign A_IO3   to pins 19         !AT Added for minimum pin test.
assign A_IO4   to pins 20         !AT Added for minimum pin test.
assign A_IO5   to pins 21         !AT Added for minimum pin test.
assign A_IO6   to pins 22         !AT Added for minimum pin test.
assign A_IO7   to pins 23         !AT Added for minimum pin test.

assign B_IO    to pins 1,2,3,4,5,6,7,8
assign B_IO0   to pins  8         !AT Added for minimum pin test.
assign B_IO1   to pins  7         !AT Added for minimum pin test.
assign B_IO2   to pins  6         !AT Added for minimum pin test.
assign B_IO3   to pins  5         !AT Added for minimum pin test.
assign B_IO4   to pins  4         !AT Added for minimum pin test.
assign B_IO5   to pins  3         !AT Added for minimum pin test.
assign B_IO6   to pins  2         !AT Added for minimum pin test.
assign B_IO7   to pins  1         !AT Added for minimum pin test.

 power  VDD,  VSS

 family  CMOS

 inputs Clock, Data,  Control

 bidirectional  A_IO, B_IO
 bidirectional  A_IO0, A_IO1, A_IO2, A_IO3      !AT Added for minimum pin test.
 bidirectional  A_IO4, A_IO5, A_IO6, A_IO7      !AT Added for minimum pin test.
 bidirectional  B_IO0, B_IO1, B_IO2, B_IO3      !AT Added for minimum pin test.
 bidirectional  B_IO4, B_IO5, B_IO6, B_IO7      !AT Added for minimum pin test.

 disable    A_IO     with  Control  to "000X"
 disable    B_IO     with  Control  to "000X"

 when  Control  is "000X" inactive A_IO
 when  Control  is "000X" inactive B_IO

 when  Control  is "0010" inactive A_IO
 when  Control  is "1000" outputs  A_IO
 when  Control  is "1110" inputs   A_IO
 when  Control  is "1101" outputs  A_IO

 when  Control  is "0010" outputs  B_IO
 when  Control  is "1000" inactive B_IO
 when  Control  is "1110" outputs  B_IO
 when  Control  is "1101" inputs   B_IO

 trace A_IO  to  Clock, Data,  Control
 trace B_IO  to  Clock, Data,  Control

 !************************************************************************
 !************************************************************************

 vector     Clock_low
     set           Control           to        "kkkk"
     set           Clock             to        "0"
     set           Data              to        "k"
 end vector

 vector     Clock_high
     set           Control           to        "kkkk"
     set           Clock             to        "1"
     set           Data              to        "k"
 end vector

 vector     Recover_1
     initialize to Clock_low
     set           Data              to        "1"
 end vector

 vector     Clock_A_low
     drive   A_IO
     set           Control           to        "kkkk"
     set           Clock             to        "0"
     set           A_IO              to        "kkkkkkkk"
 end vector

 vector     Clock_A_high
     drive   A_IO
     set           Control           to        "kkkk"
     set           Clock             to        "1"
     set           A_IO              to        "kkkkkkkk"
 end vector

 vector     Clock_AD_high
     drive   A_IO
     set           Control           to        "kkkk"
     set           Data              to        "k"
     set           Clock             to        "1"
     set           A_IO              to        "kkkkkkkk"
 end vector

 vector     Clock_AD_low
     drive   A_IO
     set           Control           to        "kkkk"
     set           Data              to        "k"
     set           Clock             to        "0"
     set           A_IO              to        "kkkkkkkk"
 end vector

 vector     Control_1111
     drive    A_IO
     set           A_IO              to        "kkkkkkkk"
     set           Control           to        "1111"
 end vector

 vector     Control_0111
     set           Control           to        "0111"
 end vector

 vector     Control_0010
     set           Control           to        "0010"
     set           Data              to        "0"
 end vector

 vector     Control_1000
     set           Control           to        "1000"
     set           Data              to        "0"
 end vector

 vector     Control_1110
     drive  A_IO
     set           Control           to        "1110"
     set           A_IO              to        "01010101"
 end vector

 vector     Control_1101
     drive  B_IO
     set           Control           to        "1101"
     set           B_IO              to        "01010101"
 end vector

 vector     Serial_Data_In_T
     set           Control           to        "kkkk"
     set           Data              to        "t"
     set           Clock             to        "k"
 end vector

 vector     Serial_Data_In_T_Disable
     drive  A_IO
     set           Control           to        "kkkk"
     set           Data              to        "t"
     set           Clock             to        "k"
     set           A_IO              to        "kkkkkkkk"
 end vector

 vector     A_Out_01010101
     receive   A_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           Data              to        "k"
     set           A_IO              to        "01010101"
 end vector

 vector     A_Out_10101010
     receive   A_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           Data              to        "k"
     set           A_IO              to        "10101010"
 end vector

 vector     B_In_A_Out_01010101
     drive     B_IO
     receive   A_IO
     set           Control           to        "kkkk"
     set           B_IO              to        "01010101"
     set           A_IO              to        "01010101"
 end vector

 vector     B_In_A_Out_10101010
     drive     B_IO
     receive   A_IO
     set           Control           to        "kkkk"
     set           B_IO              to        "10101010"
     set           A_IO              to        "10101010"
 end vector

 vector     B_Out_01010101
     receive   B_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           Data              to        "k"
     set           B_IO              to        "01010101"
 end vector

 vector     B_Output_10101010
     drive     A_IO
     receive   B_IO
     set           Control           to        "kkkk"
     set           A_IO              to        "kkkkkkkk"
     set           B_IO              to        "10101010"
 end vector

 vector     B_Out_01010101_Disable
     drive     A_IO
     receive   B_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           Data              to        "k"
     set           B_IO              to        "01010101"
     set           A_IO              to        "kkkkkkkk"
 end vector

 vector     B_Out_10101010
     receive   B_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           Data              to        "k"
     set           B_IO              to        "10101010"
 end vector

 vector     B_Out_10101010_Disable
     drive     A_IO
     receive   B_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           Data              to        "k"
     set           B_IO              to        "10101010"
     set           A_IO              to        "kkkkkkkk"
 end vector

 vector     A_In_B_Out_01010101
     drive     A_IO
     receive   B_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           A_IO              to        "kkkkkkkk"
     set           B_IO              to        "01010101"
 end vector

 vector     A_In_B_Out_10101010
     drive     A_IO
     receive   B_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           A_IO              to        "kkkkkkkk"
     set           B_IO              to        "10101010"
 end vector

 vector     A_In_B_Out_01010101_disable
     drive     A_IO
     receive   B_IO
     set           Control           to        "kkkk"
     set           A_IO              to        "01010101"
     set           B_IO              to        "01010101"
 end vector

 vector     A_In_B_Out_10101010_disable
     drive     A_IO
     receive   B_IO
     set           Control           to        "kkkk"
     set           A_IO              to        "10101010"
     set           B_IO              to        "10101010"
 end vector

 vector     A_In_11111111
     drive     A_IO
     set           Control           to        "kkkk"
     set           A_IO              to        "11111111"
 end vector

 vector     B_Input_01010101
     drive     B_IO
     set           Control           to        "kkkk"
     set           B_IO              to        "01010101"
 end vector

 vector     B_Input_10101010
     drive     B_IO
     set           Control           to        "kkkk"
     set           B_IO              to        "10101010"
 end vector

 vector     A_Input_01010101
     drive     A_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           A_IO              to        "01010101"
 end vector

 vector     A_Input_10101010
     drive     A_IO
     set           Control           to        "kkkk"
     set           Clock             to        "k"
     set           A_IO              to        "10101010"
 end vector

 vector     A_Disabled_11111111
     drive     A_IO
     set           Control           to        "kkkk"
     set           Data              to        "k"
     set           Clock             to        "k"
     set           A_IO              to        "11111111"
 end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

 vector     Control_1101_B_IO0
     drive  B_IO0
     set           Control           to        "1101"
     set           B_IO0             to        "0"
 end vector

 vector     Control_1101_B_IO1
     drive  B_IO1
     set           Control           to        "1101"
     set           B_IO1             to        "0"
 end vector

 vector     Control_1101_B_IO2
     drive  B_IO2
     set           Control           to        "1101"
     set           B_IO2             to        "0"
 end vector

 vector     Control_1101_B_IO3
     drive  B_IO3
     set           Control           to        "1101"
     set           B_IO3             to        "0"
 end vector

 vector     Control_1101_B_IO4
     drive  B_IO4
     set           Control           to        "1101"
     set           B_IO4             to        "0"
 end vector

 vector     Control_1101_B_IO5
     drive  B_IO5
     set           Control           to        "1101"
     set           B_IO5             to        "0"
 end vector

 vector     Control_1101_B_IO6
     drive  B_IO6
     set           Control           to        "1101"
     set           B_IO6             to        "0"
 end vector

 vector     Control_1101_B_IO7
     drive  B_IO7
     set           Control           to        "1101"
     set           B_IO7             to        "0"
 end vector

 vector     B_In_A_Out_IO0_0
     drive     B_IO0
     receive   A_IO0
     set           Control           to        "kkkk"
     set           B_IO0             to        "0"
     set           A_IO0             to        "0"
 end vector

 vector     B_In_A_Out_IO0_1
     drive     B_IO0
     receive   A_IO0
     set           Control           to        "kkkk"
     set           B_IO0             to        "1"
     set           A_IO0             to        "1"
 end vector

 vector     B_In_A_Out_IO1_0
     drive     B_IO1
     receive   A_IO1
     set           Control           to        "kkkk"
     set           B_IO1             to        "0"
     set           A_IO1             to        "0"
 end vector

 vector     B_In_A_Out_IO1_1
     drive     B_IO1
     receive   A_IO1
     set           Control           to        "kkkk"
     set           B_IO1             to        "1"
     set           A_IO1             to        "1"
 end vector

 vector     B_In_A_Out_IO2_0
     drive     B_IO2
     receive   A_IO2
     set           Control           to        "kkkk"
     set           B_IO2             to        "0"
     set           A_IO2             to        "0"
 end vector

 vector     B_In_A_Out_IO2_1
     drive     B_IO2
     receive   A_IO2
     set           Control           to        "kkkk"
     set           B_IO2             to        "1"
     set           A_IO2             to        "1"
 end vector

 vector     B_In_A_Out_IO3_0
     drive     B_IO3
     receive   A_IO3
     set           Control           to        "kkkk"
     set           B_IO3             to        "0"
     set           A_IO3             to        "0"
 end vector

 vector     B_In_A_Out_IO3_1
     drive     B_IO3
     receive   A_IO3
     set           Control           to        "kkkk"
     set           B_IO3             to        "1"
     set           A_IO3             to        "1"
 end vector

 vector     B_In_A_Out_IO4_0
     drive     B_IO4
     receive   A_IO4
     set           Control           to        "kkkk"
     set           B_IO4             to        "0"
     set           A_IO4             to        "0"
 end vector

 vector     B_In_A_Out_IO4_1
     drive     B_IO4
     receive   A_IO4
     set           Control           to        "kkkk"
     set           B_IO4             to        "1"
     set           A_IO4             to        "1"
 end vector

 vector     B_In_A_Out_IO5_0
     drive     B_IO5
     receive   A_IO5
     set           Control           to        "kkkk"
     set           B_IO5             to        "0"
     set           A_IO5             to        "0"
 end vector

 vector     B_In_A_Out_IO5_1
     drive     B_IO5
     receive   A_IO5
     set           Control           to        "kkkk"
     set           B_IO5             to        "1"
     set           A_IO5             to        "1"
 end vector

 vector     B_In_A_Out_IO6_0
     drive     B_IO6
     receive   A_IO6
     set           Control           to        "kkkk"
     set           B_IO6             to        "0"
     set           A_IO6             to        "0"
 end vector

 vector     B_In_A_Out_IO6_1
     drive     B_IO6
     receive   A_IO6
     set           Control           to        "kkkk"
     set           B_IO6             to        "1"
     set           A_IO6             to        "1"
 end vector

 vector     B_In_A_Out_IO7_0
     drive     B_IO7
     receive   A_IO7
     set           Control           to        "kkkk"
     set           B_IO7             to        "0"
     set           A_IO7             to        "0"
 end vector

 vector     B_In_A_Out_IO7_1
     drive     B_IO7
     receive   A_IO7
     set           Control           to        "kkkk"
     set           B_IO7             to        "1"
     set           A_IO7             to        "1"
 end vector

 !***************************************************************************
 !***************************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with IO0.

unit "awaretest B to A IO0 Test"
     execute     Control_1101_B_IO0
     execute     B_In_A_Out_IO0_0
     execute     B_In_A_Out_IO0_1
end unit

unit "awaretest B to A IO1 Test"
     execute     Control_1101_B_IO1
     execute     B_In_A_Out_IO1_0
     execute     B_In_A_Out_IO1_1
end unit

unit "awaretest B to A IO2 Test"
     execute     Control_1101_B_IO2
     execute     B_In_A_Out_IO2_0
     execute     B_In_A_Out_IO2_1
end unit

unit "awaretest B to A IO3 Test"
     execute     Control_1101_B_IO3
     execute     B_In_A_Out_IO3_0
     execute     B_In_A_Out_IO3_1
end unit

unit "awaretest B to A IO4 Test"
     execute     Control_1101_B_IO4
     execute     B_In_A_Out_IO4_0
     execute     B_In_A_Out_IO4_1
end unit

unit "awaretest B to A IO5 Test"
     execute     Control_1101_B_IO5
     execute     B_In_A_Out_IO5_0
     execute     B_In_A_Out_IO5_1
end unit

unit "awaretest B to A IO6 Test"
     execute     Control_1101_B_IO6
     execute     B_In_A_Out_IO6_0
     execute     B_In_A_Out_IO6_1
end unit

unit "awaretest B to A IO7 Test"
     execute     Control_1101_B_IO7
     execute     B_In_A_Out_IO7_0
     execute     B_In_A_Out_IO7_1
end unit

!****************************************************************

 unit  "test Synchronous serial input__B parallel output & A_disabled"

     execute       Control_0010

     homingloop  10 times
       execute     Clock_low
       execute     Serial_Data_In_T
       execute     Clock_high
       execute     B_Out_01010101  exit if pass
     end homingloop
       execute     Recover_1
       execute     Clock_low
       execute     Serial_Data_In_T
       execute     A_Disabled_11111111
       execute     B_Out_01010101_Disable
       execute     Clock_AD_high
       execute     B_Out_10101010_Disable
       execute     Clock_AD_low
       execute     Serial_Data_In_T_Disable
       execute     B_Out_10101010_Disable
       execute     Clock_high
       execute     B_Out_01010101

 end unit


 unit  "test Synchronous serial input__A parallel output"

     execute       Control_1000

     homingloop  10 times
       execute     Clock_low
       execute     Serial_Data_In_T
       execute     Clock_high
       execute     A_Out_01010101  exit if pass
     end homingloop
       execute     Recover_1
       execute     Clock_low
       execute     Serial_Data_In_T
       execute     A_Out_01010101
       execute     Clock_high
       execute     A_Out_10101010
       execute     Clock_low
       execute     Serial_Data_In_T
       execute     A_Out_10101010
       execute     Clock_high
       execute     A_Out_01010101

 end unit



 unit  "test A-synchronous Parallel data input, B Parallel data output"

     execute       Control_1110

     homingloop  4  times
       execute     Clock_A_low
       execute     A_Input_01010101
       execute     Clock_A_high
       execute     A_In_B_Out_01010101  exit if pass
     end homingloop
       execute     Clock_A_low
       execute     A_Input_10101010
       execute     A_In_B_Out_01010101
       execute     Clock_A_high
       execute     Clock_A_low
       execute     A_Input_01010101
       execute     Clock_A_high
       execute     Clock_A_low
       execute     A_In_B_Out_01010101

 end unit


 unit  "test B-Asynchronous Parallel data input, A Parallel data output"

     execute       Control_1101
       execute     B_In_A_Out_10101010
       execute     B_In_A_Out_01010101
       execute     B_In_A_Out_10101010

 end unit


 unit  "test A_disable with B_outputs in asynchronous mode"

     execute       Control_1111
       execute     A_In_B_Out_10101010_disable
     execute       Control_0111
       execute     A_In_11111111
       execute     B_Output_10101010
     execute       Control_1111
       execute     A_In_B_Out_01010101_disable
       execute     A_In_B_Out_10101010_disable

 end unit

 !  End of test
