General
- Platform and size: VME, 6U
- Number of Axes per Board: 1
- Resolution Extension: x256
- External Sample and Data Hold Inputs: 4 + 1
Operation with Plane Mirror Optics
- Resolution: 0.62 nm
- Maximum Velocity (also limited by laser head): 700 mm/sec
Timing
- Position Data Update Rate: 10 MHz
- Asynchronous Sample or Hold Uncertainty: ± 50 ns
- Synchronous Sample or Hold Uncertainty: < 800 ps + < 60 ps / deg C
Special Features
- Flexible Hardware IO
- Programmable signal routing
- 36-bit, 2´s Complement Hardware Position Output @ 10 MHz
- 10897B HAS BEEN REPLACED BY 10897C, WHICH IS IDENTICAL BUT ALSO HAS CE COMPLIANCE
The Keysight 10897B VMEbus laser axis board offers the highest measurement resolution commercially available in positioning systems. With resolution up to 0.3 nm, it provides ultra-precise position (or distance) information for advanced products such as IC fabrication equipment. The Keysight 10897B is tested at frequencies equivalent to 0.7 m/s plane mirror slew rates.
The register-programmed position axis board provides a 36-bit position word in fractional wavelengths. The word is readable over the VMEbus and is also available from a real-time hardware output on the A and C rows of the P2 connector. Its very high data rates accommodate high-bandwidth, high-performance closed-loop applications. Configured with appropriate laser and optics components, the Keysight 10897B supplies unsurpassed positioning accuracy for dynamic measurements.
- VMEbus Position Output
- Data Format:
- Units: fractions of a wavelength
- 2's Complement: choose any 32 of 35 bits to read
- Positive Logic
- Least Significant Bit (or one count) equals resolution
- Data Rate Over Backplane: >100 kHz
- Sample Data Age:
- Fixed: After a synchronous sample operation, the value in the position register will reflect the actual position that occurred approximately X ns before the sample operation was initiated. There are two user-selectable values of X, 290 ns and 790 ns.
- Variable (typically): <800 ps over the full power supply voltage specification, and <60 ps/ degree C.
- Sample Delay:
- The position register may be read 100 ns or 600 ns after a hardware sample operation, via the sample delay register bit.
- P2 Connector Hardware Position Output
- Data Format:
- Units: fractions of a wavelength
- 2's complement: 36-bit parallel binary
- Positive Logic
- Least Signigicant Bit (or one count) equals resolution
- Data Update Rate: 10 MHz (Hardware included to synchronize to slower clocks)
- Data Age:
- Fixed: The data on the hardware output line will reflect the position that occurred approximately 1.2 us before the next rising edge of the 10 MHz clock.
- Variable (typically):
- <800 ps over the full power supply voltage specification, and <60 ps/degree C.
- General Information
- VME Compliance:
- Complies with VME Specification Rev. C.1 6U size
- A16 Data Transfer Cycles
- D16 Data Transfer Cycles
- A24 Data Transfer Cycles
- D32 Data Transfer Cycles
- D08(O) Interrupt Acknowledge Cycles
- Power Requirements:
- 5 Vdc + 0.25 V/-0.125 V at less than 3.5 A
- +12 V +/-0.5 V at less than 0.1A
- -12 V +/-0.5V at less than 0.025A
- Cooling Requirements:
- 19 linear meters (60 linear feet) per minute for 0-40 degrees C operation 76 linear meters (250 linear feet) per minute minimum for 0-55 degrees C operation
- Weight: 0.45 kg (1 lb)
- Reduced data age ambiguity ensures dynamic accuracy
- Low noise rating improves repeatability
- Full electrical and mechanical compliance with VMEbus specifications
- Programmable signal routing
- High reliability backed by three-year warranty
- Integrated board functions reduce system size, complexity, development time, and cost