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Bit Error Ratio Test (BERT) Solution

Make the next leap forward with Keysight BERTs

Keysight offers the broadest choice of BERTs - covering affordable manufacturing test and high-performance characterization and compliance testing up to 32 Gb/s. NRZ and PAM4 coding scheme for 400G solution, Keysight's new flagship M8040A BERT solution capable of delivering a fully integrated 64Gbaud BER test. Combine with AWGs and M8070A BER system solution software. A revolutionary way for a BERT to perform device under test, with reliable and repeatable test results.

Keysight's Bit Error Ratio Test solutions allow the most accurate and efficient design verification, characterization, compliance and manufacturing test of high-speed communication ports for today's ASICs, components, modules and line-cards in the semiconductor, computer, storage and communication industry.

Keysight offers the broadest portfolio with four BERT families that address a variety of speed classes, usability concepts, and flexibility as well as application specific stimulus and analysis tools. All BERTs provide cost-effective and efficient in-depth insight into critical measurement tasks for today's and next generation devices with gigabit interfaces.

BERTs are used to test and characterize many high-speed digital interfaces:

QPI, FB-DIMM, PCI Express®, SATA,/SAS USB, Thunderbolt, DisplayPort, HDMI, MHL, MIPI, UHS-II, Fibre Channel, XAUI/10Gb Ethernet, CAUI/100GbE, CEI and other backplanes, XFI/XFP/SFP+/CFP modules, OTN, and PON-OLTs, Serdes, DAC, ADC, DDR, 100/200/400G b Ethernet, etc.

 

Device
under test

Bit rate Application
examples
Typical
requirements
Recommended
Keysight BERT/AWG
For R&D
Characterization, Compliance
For Manufacturing

High-speed serial
receiver in computer buses and backplanes

<32G QPI, PCI Express, SATA,
SAS, USB3.x, TBT, DP, SD UHS II,
MIPI D-PHY/ M-PHY, HDMI, DDR5
 
data rates < 16 Gb/s,
calibrated jitter, SSC, ISI and S.I.,
clock recovery, pattern sequencing
J-BERT M8020A, M8030A*,
M8040A for > 20 Gb/s
n/a
<10G MIPI D-PHY/ C-PHY
HDMI, MHL
data rates < 10G, no loopback,
3-wire or multi-level
M8190A, M8195A n/a

Backplanes, Cables,
SERDES, AOC,
Repeaters

>10G -28G 10Gbase-KR4/-CR4,
CEI, IB, TBT
CAUI, CAUI 2/4
10Gbase-KR
data rates > 10 Gb/s, de-emphasis,
x-talk, PRBS
J-BERT M8020A, M8062A, N4877A n/a
<58G CEI-56G/112G,
400GbE
PAM-4, NRZ, PRBS M8040A n/a
Optical transceivers
and sub-components:
0.6 to 58Gb/s
<58G 400GbE, 64G FC PAM-4, NRZ, PRBS M8040A  
<28G 40G/100GbE, 32G FC, CFP2/4 data rates > 16Gb/s
clean signals,
PRBS
J-BERT M8020A+M8062A N4960A
10G 10G/40GbE, PON, OTN,
8G/16G FC, QSFP, SFP+, QFP

data rates 3 to 15Gb/s,
PRBS optical stress & sensitivity,
framed bursts

J-BERT M8020A, M8030A* N4962A

*for multi-lane
** up to 4 lanes

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N4963A Clock Synthesizer 13.5 GHz - User's Guide
The N4963A Clock Synthesizer 13.5 GHz is a wideband signal generator with high-UI jitter injection capability.

User Manual 2014-10-01

N4962A Serial BERT 12.5 Gb/s - User's Guide
The N4962A Serial BERT 12.5 Gb/s is a pseudo-random bit sequence generator and error detector designed for automated production-line testing and manufacturing of optical transceivers up to 12.5 Gb/s.

User Manual 2014-09-15

N4962A Serial BERT 12.5 Gb/s - Data Sheet
The N4962A is a low cost 0.5 to 12.5 Gb/s pseudo-random bit sequence generator and bit error rate tester designed for automated production-line testing, manufacturing, and R&D use.

Data Sheet 2014-08-25

Tips and Techniques for Accurate Characterization of 28 Gb/s Designs - Application Note
The worldwide demand for data capacity in networks greatly increases every year, driven by services like cloud computing and Video on Demand.

Application Note 2014-08-02

81490A Reference Transmitter - Data Sheet
Keysight's 81490A Reference Transmitter is designed to offer excellent eye quality as a reference for testing 10GbE -LR/ -ER, 10G Fibre Channel 10GBase-SR, 40GBase-SR4, and 100GBase-SR10.

Data Sheet 2014-08-02

PDF PDF 523 KB
Instrumentation-grade Clock Recovery Solutions to 32 Gb/s - Brochure
Both bit-error-ratio-testers (BERTs) and DCA’s require a clock signal to synchronize the measurement system to the incoming data stream.

Brochure 2014-08-02

PDF PDF 662 KB
USB Design and Test - A Better Way - Application Note
Brochure covering Keysight's USB 2.0 and 3.0 test solutions portfolio and applications, discussing measurement challenges and showing how the test solutions and services address these.

Application Note 2014-07-31

15431A Filter Set for 81150A - Data Sheet
The Agilent 15431A is a filter set for the 81150A. It generates the random jitter profile for testing PCI Express 2.0 receivers. To be used in conjunction with the N4903A.

Data Sheet 2014-07-31

PDF PDF 1.09 MB
81495A Reference Receiver - Data Sheet
This document describes the technical specifications and capabilities of Agilents 81495A Reference Receiver

Data Sheet 2014-07-31

PDF PDF 477 KB
Introduces Industry's Most Accurate Test Solution for USB 3.1 Receivers
Achieve accurate receiver characterization with the J-BERT high-performance BERT

Press Materials 2014-07-09

N4963A Clock Synthesizer 13.5 GHz - Data Sheet
The N4963A Clock Synthesizer is designed to meet multiple clocking applications in one small box.

Data Sheet 2014-04-09

Download latest J-BERT M8020A application notes to master your designs
Submit the form to begin downloading the application briefs

Application Note 2014-04-09

N4967A Serial BERT System 40 Gb/s – User’s Guide
This manual is designed to familiarize users with the fundamental operations of the N4967A Serial BERT System 40 Gb/s.

User Manual 2014-04-01

N4965A Multi-Channel BERT 12.5 Gb/s - User's Guide
The user's manual covers: setting up the system, operation, applications, performance specifications, remote operation, and warranty/product service.

User Manual 2014-04-01

N4965A Multi-Channel BERT 12.5 Gb/s - Getting Started Guide
Welcome to the Keysight N4965A Multi-Channel BERT 12.5 Gb/s Getting Started Guide. This guide will help you identify the contents of the shipping package, perform a quick functional check of the product, and guide you on where to find more information and support for the N4965A.

Quick Start Guide 2014-04-01

N4968A Clock and Data Demultiplexer 44 Gb/s - User's Guide
This manual is to familiarize users with the fundamental operations of the N4968A Clock and Data Demultiplexer 44 Gb/s.

User Manual 2014-04-01

PDF PDF 730 KB
N4984A Clock Divider - User's Guide
This manual is designed to familiarize users with the fundamental operation of the N4984A Clock Divider.

User Manual 2014-04-01

PDF PDF 531 KB
J-BERT M8020A showing UI, jitter injection & de-emphasis – Video
This video gives an overview about the J-BERT M8020A high-performance BERT, including a demo of the jitter injection and de-emphasis capabilities, the user interface and the analyzer functionality.

Demo 2014-03-20

Press Releases for M8000 Series
New M8000 Series of BER Test Solutions

Press Materials 2014-03-18

N4960A Serial BERT 17 and 32 Gb/s - Data Sheet
The N4960A is the world's most affordable solution for characterizing 100GbE, 28G, and high speed SerDes applications.

Data Sheet 2014-02-05

Video for J-BERT M8020A High performance BERT
View the new video to see how the new J-BERT M8020A helps to master your designs.

Demo 2014-01-28

Agilent Technologies Introduces HDMI 2.0 Compliance Test Software for Transmitters and Receivers
Agilent Technologies Inc. (NYSE: A) today introduced two compliance test software packages for physical-layer testing of devices that use the new High-Definition Multimedia Interface (HDMI) 2.0 specification.

Press Materials 2014-01-14

Demystify MIPI M-PHY receiver physical layer test challenges – Webcast
For design, test and validation engineers who need to characterize and validate compliance of their MIPI designs.

Article 2013-11-15

J-BERT N4903B High-Performance Serial BERT - Programming Guide
This document provides the information you need for programming the Serial BERT using the Keysight IO Libraries Suite. Familiarity with the Keysight IO Libraries Suite is instrumental in understanding remote programming of the Serial BERT. See the user documentation delivered with the Keysight IO Libraries Suite for information on how to use them.

Programming and Syntax Guide 2013-11-01

J-BERT N4903B High-Performance Serial BERT - User's Guide
The Serial BERT can help you test the performance of components and systems for high-speed digital transmission equipment. An important parameter of a digital system is the rate at which errors occur in the system. The analyzer will compare the bits sent to your device with the bits received from your device. It will record the number of bit errors and display results such as the bit error ratio (BER). In addition, accumulated results can be analyzed to help you determine what caused the bit errors.

User Manual 2013-11-01

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