PathWave RFIC Design (GoldenGate) Solutions

PathWave RFIC Design (GoldenGate) is the most trusted simulation, analysis, and verification solution available for integrated RF circuit design within Cadence Virtuoso and Synopsys Custom Compiler. It provides thorough circuit and statistical simulation along with verification against the latest industry wireless standards to eliminate the costly risk of re-spins and low yields.

For wireless front end RFIC and SoC designers working on 5G, automotive radars, WiFi and mmWave applications, it is an integral part of Keysight Silicon RFIC solution that also includes:

• PathWave Advanced Design System (ADS) for small-scale RFIC front-to-back implementation
  
• RFPro, Momentum and PathWave EM Design (EMPro) for on- and off-chip electromagnetic analysis
• PathWave System Design (SystemVue) Virtual Test Benches (VTB) for system-level co-design

This suite of products links the RF system, subsystem, and component-level design and analysis as part of a unique and comprehensive RFIC design offering

PathWave RFIC Design (GoldenGate)

GoldenGate is a comprehensive RFIC Design and Verification solution that is seamlessly integrated in the Cadence Virtuoso and Synopsys Custom Compiler design environments. It offers unique simulation algorithms that enable full characterization of transceivers prior to tape-out. It includes the industry’s most advanced set of steady-state and envelope circuit simulators allow design teams to confidently tackle even the most challenging RF integrated circuit designs.

Pathwave RFIC Design (GoldenGate) Solutions

Beyond providing RF circuit simulators, PathWave RFIC Design (GoldenGate) Solutions come with powerful supporting capabilities.

Best-in-class RF circuit simulator provides the most advanced steady-state and envelope solvers for design and verification of RFICs within the Cadence Virtuoso and Synopsys Custom Compiler environments.

Advanced analysis support offers a wide variety of capabilities to fully explore, analyze and optimize designs, before tape-out, minimizing the time and expense of re-spins.

Automation and usability features accelerate design and verification by providing a number of tools on top of ADE-Explorer and ADE-Assembler.

RF to mm-Wave design support provides the best performance, capacity, and accuracy for RF to millimeter-wave (mm-Wave) applications.

 Wireless standard-compliant design capability couples the power of system- and circuit-level simulators with a comprehensive library of standard-based wireless verification Intellectual Property (IP) to accelerate the design of complex RFICs under real-life conditions.

Broad foundry PDK support for RF processes such as TSMC N6RF and N16FFC reference flows for 28 GHz and 79 GHz designs.

Leading the Way in RF Circuit Simulation

Widely known for its advanced steady-state and envelope solvers, GoldenGate also provides a full set of analog and application-specific analyses. Additionally, GoldenGate supports X-parameter* simulation and generation, which allows designers to capture the nonlinear behavior of active components in a standard format. X-parameters hide IP while enabling fast, accurate simulation within GoldenGate, ADS or SystemVue.

Keysight EDA works closely with RFIC Foundries to ensure GoldenGate covers all relevant models and is continually qualified against new and updated process nodes to ensure silicon-accurate results.

RFIC Circuit Simulation Overview

• Unmatched Harmonic-Balance and Envelope-Transient analyses o Steady-state solvers include: Harmonic Balance, time balance, time shooting, and hybrid solvers
• Envelope hybrid time-/frequency- domain nonlinear simulator
• Fast Envelope algorithm that reduces runtimes by orders of magnitude while keeping memory effects
• Comprehensive set of analyses o DC, AC, noise, S-parameters, transient
• Large-scale S-parameters, transient noise, sensitivity, as well as Bode, Nyquist and eigenvalue stability analyses
• Intermodulation distortion and gain compression
• Keysight X-parameter nonlinear behavioral model generation and simulation
  

Making Designs More Robust

GoldenGate features a suite of automation tools that enable design teams to quickly analyze and diagnose problem areas early in the design cycle, and fully optimize circuit performance before tapeout. It also tightly integrates easy-to-use tools such as multi-dimensional sweeps, optimization and load-pull analysis.

GoldenGate’s broad range of powerful, easy-to-use statistical tools helps pinpoint problems during the design phase.

Advanced Monte Carlo algorithms speed trials while reducing the number required.

Yield sensitivity histograms help identify critical design components. This information allows designers to make the design adjustments necessary to improve manufacturing yield.

Sensitivity analysis quickly allows insights on what parameters most strongly affect critical performances.                                                                                                 

Advanced Analysis Overview

• Multi-dimensional sweeps with unmatched speed and convergence
• Fast yield and mismatch analyses for DC, AC, SP, SSNA, and CR with full contribution summary table
• Sensitivity analysis for CR, SSNA and DC analyses including sensitivity summary table
• Extensive load-pull setup and plotting capabilities
• Advanced Monte Carlo sampling algorithms
• Latin Hypercube
• Hammersley Sequence Sampling
• Boundary Mode and Orthogonal Arrays
• Fast yield and mismatch analyses for DC, AC, SP, SSNA, and CR
• Full contribution table
• Powerful optimization engine
• Digital state sweeping for operational mode performance, calibration and
• control sequences
• EVM fast computation through Keysight Compact Test Signals and Distortion EVM
• Digital Pre-Distortion (DPD) tests

Automation Tools to Accelerate Your Design Cycle

Design verification of today’s RFICs can be tedious and time-consuming. GoldenGate accelerates this task with several powerful tools that allow designers to set up and run distributed simulations. These tools enable the quick analysis and display of massive amounts of data, and can be used within Virtuoso, operated separately or integrated with other third-party products.

GoldenGate offers a variety of post-processing solutions and functionality beyond support of the Cadence ADE plotting capabilities. The Performance Editor and ADS Data Display include large repositories of built-in expressions. Data Display’s flexibility enables designers to create advanced plots (e.g., load-pull contours, gain circles or eye diagrams) or even write their own functions.

Optimizing RFICs from RF to mm-Wave

By leveraging the powerful ADS model library, GoldenGate accurately models the effects of integrating microwave components with silicon RFICs within the Cadence Virtuoso environment. Its transient and envelope-transient engines handle very large S-parameter blocks, beyond the frequency-domain, using multi-threaded convolution techniques.

Tight links to the ADS common Open Access database allow designers to include IC content within the complete module design inside ADS or to perform more complete package characterization.