!!!!    6    0    1  986824188  Va242                                         

! Device           : 6552
! Function         : Static RAM 3-state 256 x 4
! revision         : B.01.00
! safeguard        : med_out_mos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."


vector cycle 1000n
receive delay 900n

assign        VCC            to pins             18
assign        GND            to pins             8

assign        Address        to pins             7,6,5,17,1,2,3,4
assign        Enable_bar     to pins             14
assign        Select_bar     to pins             13,15     !S2/S1
assign        Write_bar      to pins             16
assign        Data           to pins             12,11,10,9
assign        Disables       to pins             16,15

assign        Data_D0        to pins 9    !AT Added for minimum pin test.
assign        Data_D1        to pins 10   !AT Added for minimum pin test.
assign        Data_D2        to pins 11   !AT Added for minimum pin test.
assign        Data_D3        to pins 12   !AT Added for minimum pin test.

power         VCC, GND

family        TTL

inputs        Address, Enable_bar, Select_bar, Write_bar, Disables

bidirectional    Data
bidirectional    Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for min. pin test.

when     Enable_bar  is "1"   inactive Data
when     Select_bar  is "1X"  inactive Data
when     Select_bar  is "X1"  inactive Data
when     Write_bar   is "0"   inputs   Data
when     Write_bar   is "1"   outputs  Data

trace    Data  to  Address, Enable_bar, Select_bar, Write_bar

disable      Data        with       Disables        to       "01"

!***************************************************************************
!***************************************************************************


vector     Address_00000000
     set      Address        to                  "00000000"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Address_00000000_Select_2_false
     set      Address        to                  "00000000"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "11"
     set      Write_bar      to                  "1"
end vector

vector     Address_00000001
     set      Address        to                  "00000001"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Address_00000011
     set      Address        to                  "00000011"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Address_00000111
     set      Address        to                  "00000111"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Address_00001111
     set      Address        to                  "00001111"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Address_00011111
     set      Address        to                  "00011111"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Address_00111111
     set      Address        to                  "00111111"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Address_01111111
     set      Address        to                  "01111111"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Address_11111111
     set      Address        to                  "11111111"
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Enable_true
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "01"
     set      Write_bar      to                  "1"
end vector

vector     Enable_true_Select_2_false
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "11"
     set      Write_bar      to                  "1"
end vector

vector     S1_true
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
end vector

vector     Read_0000
     receive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data           to                  "0000"
end vector

vector     Read_0001
     receive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data           to                  "0001"
end vector

vector     Read_0011
     receive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data           to                  "0011"
end vector

vector     Read_0111
     receive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data           to                  "0111"
end vector

vector     Read_1111
     receive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data           to                  "1111"
end vector

vector     Read_1110
     receive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data           to                  "1110"
end vector

vector     Read_1100
     receive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data           to                  "1100"
end vector

vector     Read_1000
     receive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data           to                  "1000"
end vector

vector     Read_1001
     receive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data           to                  "1001"
end vector

vector     End_cycle
     set      Enable_bar     to                  "1"
     set      Select_bar     to                  "11"
     set      Write_bar      to                  "1"
end vector

vector     Write_true
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
end vector

vector     Write_true_Select_1_false
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "11"
     set      Write_bar      to                  "0"
end vector

vector     Write_0000_Select_1_false
     drive Data
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "11"
     set      Write_bar      to                  "0"
     set      Data           to                  "0000"
end vector

vector     Write_0000
     drive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data           to                  "0000"
end vector

vector     Write_0001
     drive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data           to                  "0001"
end vector

vector     Write_0011
     drive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data           to                  "0011"
end vector

vector     Write_0111
     drive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data           to                  "0111"
end vector

vector     Write_1111
     drive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data           to                  "1111"
end vector

vector     Write_1110
     drive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data           to                  "1110"
end vector

vector     Write_1100
     drive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data           to                  "1100"
end vector

vector     Write_1000
     drive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data           to                  "1000"
end vector

vector     Write_1001
     drive Data
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data           to                  "1001"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector     Read_D0_0
     receive Data_D0
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data_D0        to                  "0"
end vector

vector     Read_D0_1
     receive Data_D0
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data_D0        to                  "1"
end vector

vector     Read_D1_0
     receive Data_D1
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data_D1        to                  "0"
end vector

vector     Read_D1_1
     receive Data_D1
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data_D1        to                  "1"
end vector

vector     Read_D2_0
     receive Data_D2
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data_D2        to                  "0"
end vector

vector     Read_D2_1
     receive Data_D2
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data_D2        to                  "1"
end vector

vector     Read_D3_0
     receive Data_D3
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data_D3        to                  "0"
end vector

vector     Read_D3_1
     receive Data_D3
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "1"
     set      Data_D3        to                  "1"
end vector

vector     Write_D0_0
     drive Data_D0
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data_D0        to                  "0"
end vector

vector     Write_D0_1
     drive Data_D0
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data_D0        to                  "1"
end vector

vector     Write_D1_0
     drive Data_D1
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data_D1        to                  "0"
end vector

vector     Write_D1_1
     drive Data_D1
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data_D1        to                  "1"
end vector

vector     Write_D2_0
     drive Data_D2
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data_D2        to                  "0"
end vector

vector     Write_D2_1
     drive Data_D2
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data_D2        to                  "1"
end vector

vector     Write_D3_0
     drive Data_D3
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data_D3        to                  "0"
end vector

vector     Write_D3_1
     drive Data_D3
     set      Address        to                  "kkkkkkkk"
     set      Enable_bar     to                  "0"
     set      Select_bar     to                  "10"
     set      Write_bar      to                  "0"
     set      Data_D3        to                  "1"
end vector

!***************************************************************************
!***************************************************************************


sub        Read_data (Address,Data)
     execute        Address
     execute        Enable_true
     execute        S1_true
     execute        Data
     execute        End_cycle
end sub

sub        Write_data (Address,Data)
     execute        Address
     execute        Enable_true
     execute        Write_true
     execute        Data
     execute        End_cycle
end sub

!****************************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit   "awaretest D0 Test"

   call Write_data (Address_00000000, Write_D0_0)
   call Read_data (Address_00000000, Read_D0_0)

   call Write_data (Address_00000000, Write_D0_1)
   call Read_data (Address_00000000, Read_D0_1)

end unit

unit   "awaretest D1 Test"

   call Write_data (Address_00000000, Write_D1_0)
   call Read_data (Address_00000000, Read_D1_0)

   call Write_data (Address_00000000, Write_D1_1)
   call Read_data (Address_00000000, Read_D1_1)

end unit

unit   "awaretest D2 Test"

   call Write_data (Address_00000000, Write_D2_0)
   call Read_data (Address_00000000, Read_D2_0)

   call Write_data (Address_00000000, Write_D2_1)
   call Read_data (Address_00000000, Read_D2_1)

end unit

unit   "awaretest D3 Test"

   call Write_data (Address_00000000, Write_D3_0)
   call Read_data (Address_00000000, Read_D3_0)

   call Write_data (Address_00000000, Write_D3_1)
   call Read_data (Address_00000000, Read_D3_1)

end unit

unit       "RAM TEST"

!   Initialize Ram

     call     Write_data (Address_00000000,Write_1111)
     call     Write_data (Address_00000001,Write_0000)
     call     Write_data (Address_00000011,Write_0000)
     call     Write_data (Address_00000111,Write_0000)
     call     Write_data (Address_00001111,Write_0000)
     call     Write_data (Address_00011111,Write_0000)
     call     Write_data (Address_00111111,Write_0000)
     call     Write_data (Address_01111111,Write_0000)
     call     Write_data (Address_11111111,Write_0000)

!  Write data to Ram cells

     call     Write_data (Address_00000000,Write_0000)
     call     Write_data (Address_00000001,Write_0001)
     call     Write_data (Address_00000011,Write_0011)
     call     Write_data (Address_00000111,Write_0111)
     call     Write_data (Address_00001111,Write_1111)
     call     Write_data (Address_00011111,Write_1110)
     call     Write_data (Address_00111111,Write_1100)
     call     Write_data (Address_01111111,Write_1000)
     call     Write_data (Address_11111111,Write_1001)

!   Read data from Ram cells

     call     Read_data (Address_00000000,Read_0000)
     call     Read_data (Address_00000001,Read_0001)
     call     Read_data (Address_00000011,Read_0011)
     call     Read_data (Address_00000111,Read_0111)
     call     Read_data (Address_00001111,Read_1111)
     call     Read_data (Address_00011111,Read_1110)
     call     Read_data (Address_00111111,Read_1100)
     call     Read_data (Address_01111111,Read_1000)
     call     Read_data (Address_11111111,Read_1001)

end unit

unit       "Chip_Select_1_false"

     call     Write_data (Address_00000000,Write_1111)
     execute        Address_00000000
     execute        Enable_true
     execute        Write_true_Select_1_false
     execute        Write_0000_Select_1_false
     execute        End_cycle
     call     Read_data (Address_00000000,Read_1111)

end unit

unit       "Chip_Select_2_false"

     call     Write_data (Address_00000000,Write_1111)
     execute        Address_00000000_Select_2_false
     execute        Enable_true_Select_2_false
     execute        Write_true
     execute        Write_0000
     execute        End_cycle
     call     Read_data (Address_00000000,Read_1111)

end unit

!   End of test