What’s Next for Keysight EDA Memory Designer?
From cloud computing to autonomous vehicles, the demand for faster memory interfaces is accelerating. With transfer rates up to 6.4 Gbps, the latest standard for double data rate (DDR) memory meets the insatiable need for speed of today’s electronics. But like any new standard, DDR5 also comes with its design challenges. The latest release of Keysight EDA Advanced Design System (ADS) has arrived, and it is built to handle the demands of next-generation memory designs.
Join us on June 3rd for an exclusive look at the latest release of PathWave ADS for next-generation memory design. Learn how ADS 2022 enables hardware engineers to meet time-to-market requirements and deliver a high-performance, reliable end-product. Click here to register today!
Event Details
Date: Thursday, June 3, 2021
Time: 1:00 pm EDT/ 10:00 am PDT
Duration: 1 hour
Speakers:
- Tom Lillig, General Manager, PathWave Software Solutions
Trends and Market Challenges in Electronic Design Workflows - Perry Keller, Keysight Memory Standards Program Manager
What’s Next for DDR5 Memory and the Road to DDR6 - Benjamin Dannan, Staff Digital Engineer, Northrop Grumman
Northrop Grumman Case Study: Rigorous Design Analysis of a DDR4 DIMM-Based System - Stephen Slater, PathWave Product Planner
Introducing PathWave ADS 2022 for Next-Generation Memory
Join us for the PathWave Design 2022 – High-Speed Digital Design Webinar. Register Today!