DDR Memory Overview, Development Cycle and Challenges
Application Notes
DDR Overview
Memory is everywhere – not just in servers, workstations and desktops, but also embedded in consumer electronics, automobiles and other system designs. With each generation of DDR SDRAM, short for Double Data Rate Synchronous Dynamic Random Access Memory, speeds increase, packages sizes decrease, and power consumption decreases (see Table 1). With these improvements comes the added challenge of decreased design margins, signal integrity, and interoperability.
DDR Interface
The Joint Electronic Devices Engineering Council (JEDEC) has also introduced a new DDR standard for low-power DDR (LPDDR) or mobile devices (mobile-DDR). As the name implies, this standard uses lower signal amplitude, improving power consumption. Currently the standard meets the specifications for DDR1. Engineers will not need to re-design the link or protocol layer of devices to take advantage of the lower power consumption, since little investment is required to adjust the voltage level in the system.