Data Sheets
Introduction
FPGA dynamic probe for Altera used in conjunction with an InfiniiVision 6000 or 7000 Series MSO provides an effective solution for simple through complex debugging of systems incorporating Altera FPGAs.
The challenge
You rely on the insight a MSO (mixed-signal oscilloscope) provides to understand the behavior of your FPGA in the context of the surrounding system. Design engineers typically take advantage of the programmability of the FPGA to route internal nodes to a small number of physical pins for debugging. While this approach is very useful, it has significant limitations.
Debug your FPGAs faster and more effectively with a MSO
FPGA dynamic probe lets you:
View internal activity – With the digital channels on your MSO, you are normally limited to measuring signals at the periphery of the FPGA. With the FPGA dynamic probe, you can now access signals internal to the FPGA. You can measure up to 256 internal signals for each external pin dedicated to debug, unlocking visibility into your design that you never had before.
Make multiple measurements in seconds – Moving probe points internal to an FPGA used to be time consuming. Now, in less than a second, you can easily measure different sets of internal signals without design changes. FPGA timing stays constant when you select new sets of internal signals for probing.
Leverage the work you did in your design environment – The FPGA dynamic probe maps internal signal names from your FPGA design tool to your Keysight Technologies, Inc. MSO. Eliminate unintentional mistakes and save hours of time with this automatic setup of signal and bus names on your MSO.
Design step 1: Configure the logic analyzer interface file and core parameters
You need to create a Altera LAI file with MSO in Quartus II. This file defines the interface that builds a connection between the internal FPGA signals and the MSO digital channels. You can then configure the core parameters, which include number of pins, number of signal banks, the type of measurement (state or timing), clock and the power-up state.
Design step 2: Map the Altera LAI core outputs to available I/O pins
Use Pin Planner in Quartus II to assign physical pin locations for the LAI.
Design step 3: Assign LAI bank parameters
Assign internal signals to each bank in the LAI after you have specified the number of banks to use in the core parameters. Find the signals you want to acquire with the Node Finder and assign them to the banks.
With the LAI core fully configured and instantiated into your FPGA design, you’re ready to compile your design to create the device programming file (.sof). Then, to make measurements you’ll move to the Keysight MSO with FPGA dynamic probe software.
Activate FPGA dynamic probe for Altera
The FPGA dynamic probe application allows you to control the LAI and set up the MSO for the desired measurements. This application runs on a PC.
Connect your MSO to your PC
From FPGA dynamic probe application software, specify the communication link between your PC and MSO.
Measurement setup step 1: Establish a connection between the MSO and the LAI
The FPGA dynamic probe application establishes a connection between the MSO and the FPGA via a JTAG cable. It also determines what devices are on the JTAG scan chain and lets you pick the one with which you wish to communicate.
Measurement setup step 2: Configure the device and import signal names
If needed, you can configure the device with the SRAM object file (.sof) that includes the logic analyzer interface file. The FPGA dynamic probe application reads a .lai file produced by Quartus II. The names of signals you measure will now automatically appear in the label names on your Keysight MSO.
Measurement setup step 3: Map FPGA pins
Select your probe type and easily provide the information needed for the MSO to automatically track names of signals routed through the LAI file.
Setup complete: Make measurements
Quickly change which signal bank is routed to the MSO. A single mouse click tells the LAI core to switch to the newly specified signal bank without any impact to the timing of your design. To make measurements throughout your FPGA, change signal banks as often as needed. With each new selection of a signal bank, FPGA Dynamic Probe updates new signal names from your design to the MSO. User-definable signal bank names make it straight forward to select a part of your design to measure.
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