The presentations below discuss the many design challenges introduced by leading edge semiconductor technologies and the impact to, not just individual transistors, but also circuits such as SRAM performance. Key topics include: measurement requirements, foundry model libraries, and 1/f and random telegraph noise(RTN). The seminar consists of topics of interest for foundry, lab/reliability engineers, device modeling engineers, foundry interface groups, and anyone interested in better solutions for SRAM cell modeling, 1/f noise and RTN measurement, model extraction, model re-centering, and model quality assurance automation.

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What's New in Keysight Technologies' Device Modeling Portfolio in 2017

Highlights of new capabilities in Keysight's end-to-end device modeling portfolio, Power Electronics modeling solution preview, Wafer-level 1/f noise & Random Telegraph Noise (RTN) measurement solutions, Model Builder Program (MBP), and Model Quality Assurance (MQA).

Python-driven Table Generation in Automated Device Model Validation

MQA is a well-known, automated SPICE model validation software that enables engineers to check and analyze SPICE model libraries, compare different models, and generate quality assurance (QA) reports in a complete and efficient way. MQA 2017 extends these capabilities by introducing the Python Report Formatting System (PyRFS) module, which allows engineers to customize tables—either generate new tables or update existing tables—in .csv and .xlsx file formats.

Automatable RTN Measurement Using the B1500A Semiconductor Device Parameter Analyzer

As device lithographies have continued to shrink, understanding the impact of random telegraph noise (RTN) on integrated circuits has become increasingly important. Due to its innate random nature and dependence on applied voltage, characterizing RTN on a process requires many measurements to be made across a wafer at multiple gate-to-source biases. This section will cover the basics of RTN measurement and outline a cost-effective Keysight solution using WaferPro Express and the B1500A Semiconductor Device Analyzer.

Static Random Access Memory (SRAM) Cell Modeling in MBP 2017

The latest release MBP 2017 now features a SRAM cell model generation package that’s designed to address the challenges of modern complex SRAM cell modeling, by enabling engineers to extract transistor-level and memory-cell models in one MBP session.

The New Re-centering Solution in MBP 2017 Update 1

A preview of the up-coming new Re-centering function for re-centering an existing model to a new Specification, with fully customizable device targets definition and scaling graph visualization.

How to Extract BSIM4 DC Model

MBP 2017 improves the model extraction process through the use of special utilities and scripting. This new, improved modeling process will be demonstrated on a BSIM4 transistor.

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