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A design methodology will be demonstrated for 28 Gb/s SERDES channels using the Xilinx Virtex-7 Transmitter (Tx) to show the required trade-offs that enable robust performance that is easy to verify with measurement. Tx and Rx characterization provide information on the spectral demands for accurate de-embedding of the passive fixture channel; simulation of cables, connectors, vias, PCB transmission-lines, and package ball-out determine critical elements for performance; physical routing along with test structures will determine the ability of measurements to verify performance at the DUT package bumps. Novel 1 port fixture measurements will be compared with previous full path probing and 2x test fixture measurement methods to enable reliable fixture removal. Combining design and measurement methodology enables the capture of 28 Gb/s Tx waveforms at the BGA package bumps even with frequency dependent losses in the fixture path connection to the measuring oscilloscope.
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