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2–26.5 GHz Variable Gain Amplifier Using TC700 and TC701 GaAs MMIC Components

Technical Overviews

1.0 Abstract

A review of a broadband 2 to 26.5 GHz variable gain amplifier is presented. This amplifier was constructed to demonstrate the performance characteristics of two WPTC MMIC compo­nents: the TC700 TWA, and the TC701 broadband attenuator. Measured results on small–signal characteristics, large–signal power and gain, and harmonic distortion are presented in order to communicate the potential performance characteris­tics and limitations of these devices.

2.0 Introduction

The following paper describes a broadband, multi-stage GaAs MMIC amplifier characterized over the full 2–26.5 GHz frequency range. This amplifier features 30 dB of tunable gain control and is capable of delivering 20 dBm output power to  20 GHz, and a minimum gain of 20 dB to 26.5 GHz. Maximum flatness obtainable is ±1 dBm from 2–26.5 GHz. The harmon­ics under near–saturation conditions are –25 and –30 dBc for second and third harmonic levels, respectively, at fundamental frequencies to 8 GHz.

3.0 Assembly and Topology

The design of this three stage amplifier is based on two GaAs MMIC components currently being produced by WPTC. The first is the TC700 traveling wave amplifier which provides approximately 8 dB gain to 26.5 GHz and is available in chip form. Three TC700s are cascaded in series to provide the  amplifier gain. The amplifier block diagram is shown in Figure 1. Tunable gain is achieved via a TC701 broadband (50 GHz) attenuator that proceeds the TC700s. The TC701 has 30 dB of dynamic range at 1 GHz, and increases to approximately  35 dB at 26.5 GHz and 40 dB at 50 GHz.

The amplifier topology, illustrated in Figure 2, consists of an input thin film circuit with a 50 transmission line, fol­lowed by the TC701, and then the cascaded series of TC700 TWAs, each separated by 50 Ω transition circuits. The thin film circuits are all fabricated on 10 mil sapphire substrates and include 10 pf beam lead DC block capacitors. The lengths of the input and transition circuits are kept short to control the in–band ripple. The output circuit is a longer 50 Ω thru–line, which is used to fill in the extra space in the package. In other amplifier configurations this extra space can accommodate additional stages, and other circuits such as gain slope compensation circuits and filters. All active components are soldered to moly shims which are then epoxied onto the carrier.

The package includes ten DC feedthrough capacitors, five on a side. Two are used to the V1, V2 controls on the TC701, and six are used for the gate and drain biases for the TC700s. Over voltage protection is included in the drain bias circuitry, with the addition of ten volt zener diodes, and 68 pf shunt chip capacitors. A bipolar controlled bias board is employed to pass DC bias to the packaged amplifier, and allows independent monitoring of all voltages and currents to each stage. This bias board is specifically designed to mate to the test package and the entire package/bias board assembly is mounted on a large heat sink for proper heat dissipation.

A. Small signal performance

Although this amplifier was originally intended to deliver satisfactory RF performance to 20 GHz, the amplifier pro­vided excellent performance to 26.5 GHz. Initially dubbed the “20–20–20 Amp,” the amplifier goals included a minimum of

20 dB gain and 20 dBm output power to 20 GHz. However, at first turn–on the amplifier delivered a minimum gain of over 23 dB from ~800 MHz to 26.5 GHz. Figure 3 shows the small–signal gain (|S21|) vs. frequency for various attenuator set­tings. The TWAs are biased to 150 mA/stage with seven volts on the drain. Since the IDSS of the TWAs was ~160 – 170 mA, only a slight negative voltage on the gate line was required to achieve the desired operating current.

The attenuator was first adjusted to minimum attenuation to record the maximum gain of the amp and determine the gain slope. Then, the attenuation was incremented in 5 dB steps while maintaining this same gain slope to measure the broadband dynamic range. At minimum attenuation, the maxi­mum gain was 30.9 dB @ 1.9 GHz, and the minimum gain was 23.7 dB @ 23.1 GHz. This yields a gain slope of ~7 dB (or a gain flatness of 3.5 dB) across the band. Additional gain mea- surements were recorded as the attenuation was increased while maintaining the same gain slope. At maximum attenu­ation the gain slope increased to about 14 dB (±7 dB) with a maximum gain of 2.2 dB @ 1.6 GHz. The dynamic range at 1.6 GHz is ~29 dB, and the maximum dynamic range occurred around 23 GHz, with a value over 35 dB.

No attempt was made to extend the low frequency perfor­mance of the amplifier below 800 MHz. The low frequency performance is limited mainly by the small 10 pF interstage blocking capacitors. The high frequency performance actually extends beyond 26.5 GHz but, due to test set limitations, was not measured.

The gain slope measured agrees with the initial expectations and can be calculated based on the size of the package, the flatness characteristics of the TC700 s, and the insertion flatness of the TC701 at minimum attenuation. The package length is approximately 28.5 mm from inner wall to inner wall, and with 50 Ω thru lines and transition circuits, the package gain slope, including the SPC 3.5 mm connections, is ~2 dB. Since both DC and small–signal data was available on each TWA, three devices were selected with a 2–26.5 GHz gain

slope of 1 dB. At minimum attention setting, the attenuator has a slope around 2 dB across the band. Therefore,

The attenuator can be used to compensate for the intrinsic gain slope of the amplifier via the independent control volt­ages, V1 and V2. However, this will result in poorer input and output return loss of the TC701 at some frequencies. Figure 4(a) through (c) shows the small–signal response of the amplifier with S21 > 20 dB, and with the attenuator adjust­ed to yield the flattest gain from 2 to 26.5 GHz. In Figure 4(a) the gain is greater than 20 dB across the entire band, and the worst case gain flatness is ±1 dB. The attenuator has been adjusted to yield a pseudo positive gain slope to compen- sate for the 7 dB slope described previously. In reality, this is achieved by creating a greater low– frequency mismatch at the input of the attenuator, as seen in Figure 4(b). Under these conditions, the worst case input match between 2 and 26.5 GHz was –9.3 dB, and occurred at 2 GHz. The worst case output match was –8.4 dB which also occurred at 2 GHz. Since the input match is dominated by the attenuator, a direct performance trade– off can be seen between the over­all amplifier flatness and the broadband input response of the attenuator.

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