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N6462A and N6462B DDR4/LPDDR4 Compliance Test Software

Data Sheets

Keysight Technologies

N6462A and N6462B DDR4/LPDDR4

Compliance Test Software

N6462A works with Infiniium 90000A, V-Series, and Z-Series oscilloscopes

N6462B works with Infiniium 9000A and S-Series oscilloscopes

Data Sheet

Introduction

The Keysight Technologies, Inc. DDR4 and LPDDR4 compliance test application provides a fast and easy way to test, debug and characterize your DDR4 and LPDDR4 designs. The tests performed by the software are based on the JEDEC1 JESD79-4 DDR4 SDRAM and JESD209-4 LPDDR4 Specification. In addition, the application features Custom mode, which covers crucial measurements such as eye-diagram analysis, mask testing, ringing and other tests that are not covered in the specifications but are critical for characterizing DDR4 and LPDDR4 devices. The test application offers a user-friendly setup wizard and a comprehensive report that includes margin analysis.

DDR4 is an evolutionary upgrade to DDR3 memory systems. DDR4 technology enables higher bandwidth for data transfer than DDR3 and allows you to build devices with even smaller chip footprints that consume less power and generate less heat. DDR4 achieves these advances with enhanced fine ball-grid array (FBGA) packaging, on-die termination, self-calibration and automatic self-refresh for improved control of signal integrity.

LPDDR4 DRAM (with data rates up to 4266 MT/s) is 50 percent faster than the industry’s current highest performance LPDDR3, which operates at 2133 MT/s. The new LPDDR4 also operates at lower electrical power than LPDDR3, which helps reduce power consumption in the mobile applications.

Signal integrity is crucial for memory system interoperability. Reference clock jitter measurements help you ensure that jitter is well within the specifications, which is the key to reliable and interoperable modular memory systems. Electrical and timing characteristics of other signals are also critical, to ensure the memory system functions correctly and stays error free. The new data jitter measurements enable characterization of jitter to determine the data valid window.

The addition of the DDR4 debug tool helps memory designers perform pre- and post-compliance testing with saved oscilloscope waveform traces. The tool allows for navigation capability with measurement markers to help navigate to problem areas for further testing.

The DDR4 and LPDDR4 compliance test application is compatible with Keysight Infiniium digital storage oscilloscopes.

Comprehensive Test Coverage

With the DDR4 and LPDDR4 compliance test application, you can use the same oscilloscope you use for everyday debugging to perform automated testing and margin analysis based on the JEDEC electrical and timing specifications. The application automatically configures the oscilloscope for each test and provides informative results. It includes margin analysis indicating how close your device comes to passing or failing the test for each specification. Some of the difficulties in performing the tests are connecting to the target device, configuring the oscilloscope, performing the tests and analyzing the measured results.

The DDR4 and LPDDR4 compliance test application does most of this work for you. If you discover a problem with your device, the Custom mode feature in the test application and debug tools in the oscilloscope are available to aid in root-cause analysis.

Features

The compliance test application offers several features to simplify the validation of your designs:

  • New setup wizard for quick setup, configuration and test.
  • Enhanced execution speed and proven test algorithm for clock test, which minimizes your compliance test time.
  • User-selected tests and configurations based on JEDEC JESD79-4A and JESD209-4 Specification data rate.
  • Unique technique to provide read-write burst signal separation on the same bus in realtime mode, allowing powerful debug and analysis.
  • Option to use phase difference or mixed signal oscilloscope read/write command trigger, allowing robust read and write separation for JEDEC measurement.
  • New wizard tool to automate voltage threshold settings for nonstandard operating voltages adds flexibility in characterization work.
  • Ability to analyze the loading effect of adjacent RANK of the same memory channel.
  • Test framework provides powerful characterization through multiple trials that show a full array of statistics for each measurement and returns the worst measurement value.
  • DDR debug tool allows for navigation to areas of interest in a saved set of waveforms with JEDEC measurement for pre- and post-compliance testing, which includes electrical, timing and multiple eye diagram analysis.
  • Offline setup allows for compliance testing on saved waveform files from oscilloscope or ADS simulation tool.
  • Interface to allow user to export the test result directly to a data repository server via the N8844A Data Analytics Web Service software.

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