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W1714 SystemVue AMI Modeling Kit, W1713 SystemVue SerDes Model Library

Data Sheets

 Keysight’s W1714 SystemVue AMI Modeling Kit consists of SerDes libraries for SystemVue plus automatic IBIS AMI model generation. The W1713 SystemVue SerDes Model Library is a subset of W1714 that omits its code generation feature. It is used for architecture optimization of a serializer/deserializer (SerDes) in cases where AMI generation is not required.

W1714 AMI Modeling Kit

The W1714 AMI Modeling Kit lets you optimize the signal processing blocks for your SerDes integrated circuit (IC) at the electronic system level (ESL). Once you’ve designed and optimized the algorithms, SystemVue automatically generates an IBIS AMI model that you can freely redistribute to your customers as an ‘executable datasheet’ to help them design your chip into their system.

 

Why IBIS AMI? Why Now?

The motivating force behind the IBIS AMI modeling standard is the analog-to-digital transition in SerDes, which has had a big impact on model generation and simulation. Previously, SerDes were simple analog circuits with few—if any—register settings. IC vendors could provide SPICE netlist-based models of the small number of transistors in the circuit. For these relatively simple circuits, SPICE provided a throughput of perhaps a thousand bits per minute. This was acceptable because the OEM only had to do a small number of simulations. There were only a small number of points in the design space because there were only a few field-selectable register settings (e.g., gain or termination impedance value).

Although the circuits were small, the implementation details contained significant intellectual property (IP), which had to be protected with an encryption key specific to the EDA tool. Consequently, using a SPICE-like EDA tool was acceptable provided the IC vendor was prepared to create, verify and support multiple models—one for each EDA vendor’s encryption key.

Today, the situation has changed dramatically. Modern SerDes are mini communication systems with very complex digital signal processing and many field-selectable register settings, such as tap values, to optimize. Without IBIS AMI, the IC vendor would have to provide a model containing ten thousand transistors or more. It’s prohibitively expensive and unnecessarily wasteful in terms of compute time to model the behavior of multiply-accumulate logic by solving Kirchoff current laws. Instead, an EDA workstation can model that behavior natively and with 100% accuracy by using just one CPU instruction rather than the billions of cycles required to get the same answer via SPICE.

IBIS (Input-output Buffer Information Specification) is an industry standard, fast, behavioral “executable data sheet” of a chip I/O. AMI (Algorithmic Modeling Interface) is a feature that was introduced in IBIS version 5.0.

Unlike the traditional, analog part of the IBIS model (which is human- and computer-readable text-based specification of component values), the AMI portion is computer-readable machine-code executable that is dynamically linked into the EDA tool. Specifically, it’s a dynamic link library (DLL) on Windows® or a shared object on Linux. The machine code hides the IC vendors IP without the need for proprietary encryption. The code contains no implementation details: only a behavioral model of the digital signal processing used in the chip. The benefit to the IC vendor is that the model is ‘write once, run anywhere.’ The OEM gets a model that is very fast. This is because the AMI models are compatible with modern channel simulators like the one in Keysight’s Advanced Design System (ADS) software, which determine ultra-low BER contours in seconds using step responses and statistical techniques. With AMI models, it becomes practical for OEMs to run optimizing parameter sweeps on the end-to-end serial link to optimize the channel and tap values, as well as other field-selectable settings on each end of the SerDes links.

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