Eight steps to getting the best possible test coverage.
IEEE 1149.1 for boundary scan adoption has seen a steady climb in use for the past five years. In particu-lar, it has gained popularity with NPI test engineers working with high node count printed circuit boards for telecom network servers/switches and PC servers. There are several ways to implement boundary scan test on PCBs, the two most common being:
- Native boundary scan on in-circuit test systems. (Note: Native boundary on ICT is an integrated solution where the boundary scan test will be developed and executed within the same ICT interface. No additional third-party hardware or software is needed.)
- Standalone benchtop boundary scan. Stand-alone benchtop boundary scan is preferred during prototype/NPI, as it enables PCB testing without building an ICT fixture. However, it has not been adopted for high-volume manufacturing, where the majority of manufacturers use the native boundary scan on ICT. Here’s why:
- Cost. A basic benchtop boundary scan setup is about $10,000 to $20,000. Additional licenses for development, debug and runtime features will increase the cost of the benchtop boundary scan solution up to two to three times the basic cost. Compared to the cost of using native boundary scan on ICT solution, the latter is practically free, as most EMS providers and ODMs would already have boundary scan licenses enabled on their exist-ing ICT systems, which include development and debug features.
- Separate station. Running an extra station after ICT doesn’t appeal to most assemblers, as it means extra system and manpower costs, not to mention an additional process.There are other minor reasons, such as local sup-port, especially for the majority of high-volume manu-facturing sites in Asia. Availability of expert support from the benchtop boundary scan vendors in Asia has not come far compared with that offered by ICT vendors. This is understandable, since ICT has been around for more than 30 years in electronics manufac-turing, fostering a more robust support model. These are just a few reasons why most assemblers prefer ICT for boundary scan test for volume prod-ucts. Besides, ICT offers coverage for most of the PCB defect spectrum (opens, shorts), analog components value measurements, as well as powered test, which includes voltage measurements, clock measurements, digital test and in-system programming capabilities.
