Data Sheets
DDR2/3 measurement and debug work has become more complex and time consuming over the years as the speed becomes faster and the architecture becomes more advance. Logic analyzer is one of the main measurement tools to acquire multiple DDR buses at speed for analysis through saved traces in waveform and listing window. This sometimes can be time consuming and complex with deep traces. The B4622A DDR2/3 protocol compliance and analysis tool enables automation on the measurement of your deep DDR bus trace to help you quickly identify protocol problem area and also gives you an overview of your system performance.
Features
DDR2/3 Protocol Compliance Analysis
The B4622A DDR2/3 protocol compliance and analysis tool enables timing and functional validation measurement through the protocol compliance check capability. The tool provides the test results with details of the test failure in HTML format for reporting purposes. The following is the list of timing and protocol violations analysis enabled with the tool.
Timing violations;
DDR2/3 Performance Analysis
Another key feature of the B4622A is the ability to view the performance of your DDR bus through bus statistic report and histogram. The bus statistic report gives you an overview of the DDR bus utilization for a specific trace to help you analyze the behavior and activity of your DDR bus. The histogram view reports the number of access in specific memory location to help you improve optimization by controlling the number of access across the address bus.
DDR2/3 Trigger Tool
Setting up a trigger on a specific DDR2/3 physical address to obtain the corresponding data bus can be very tedious. The B4622A allows you to automatically create a trigger on a specific physical address without having to go through a step by step trigger add-in. The trigger setup tool incorporates a user-friendly interface to help you quickly setup the trigger
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