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Ensuring Compliance and Interoperability of DDR Designs
The Joint Electronic Devices Engineering Council (JEDEC) specification requires a large number of test parameters to be verified for DDR compliance – a time-consuming exercise if you make the measurements manually.

Application Note 2008-12-19

PDF PDF 379 KB
Debugging Signal Integrity and Protocol Layers on DDR Designs
As DDR data transmission rates increase, signal integrity and clarity become critical concerns. So one of the primary challenges with DDR is debugging failures.

Application Note 2008-12-19

PDF PDF 984 KB
PCI Express® Revision 2 - Receiver Testing With J-BERT N4903A and 81150A Pulse - Application Note
Receiver Testing With J-BERT N4903A and 81150A Pulse

Application Note 2008-12-03

PDF PDF 1000 KB
Boosting PLL Design Efficiency From free-running VCO characterizations to closed-loop PLL evaluation
This application note describes introduces practical solutions for VCO/PLL performance evaluation and gives actual examples of parameter measurements using the E5052B.

Application Note 2008-11-21

Characterizing Clock Jitter through Phase Noise Measurements Speeds up Design Verification Process
This white paper discusses a new measurement method for obtaining highly accurate low random jitter (RJ) measurements and performing real-time analysis of RJ and periodic jitter (PJ) of components.

Application Note 2008-11-20

Upgrade to PCI Express 2.0© Receiver Test - Application Note
The 15431A is a filter set for the 81150A. It generates the random jitter profile for testing PCI Express 2.0 receivers, to be used in conjunction with the N4903A. This fact sheet explains the upgrade.

Application Note 2008-10-24

PDF PDF 348 KB
Benefits of using PCI Express 2.0. - Application Note
An overview of the main features and benefits of using PCI Express 2.0

Application Note 2008-10-17

PDF PDF 764 KB
Agilent Technologies Introduces Industry-First End-to-End DigRF V4 Measurement Solution for Mobile

Press Materials 2008-10-01

Agilent Technologies' All-in-One MIPI D-PHY Test Platform Selected by ST-NXP Wireless

Press Materials 2008-09-17

A Time-Saving Method for Analyzing Signal Integrity in DDR Memory Buses
This application note covers new tools and measurement techniques for characterizing and validating signal integrity of DDR (double data rate synchronous dynamic random access memory) signals.

Application Note 2008-09-10

Method of Implementation (MOI) for DisplayPort Sink Compliance Test - Application Note
Method of Implementation (MOI) for DisplayPort Sink Compliance Test

Application Note 2008-08-18

PDF PDF 1.87 MB
Solutions for MB-OFDM Ultra-Wideband (UWB) Application Note
Application note describes hardware and software for ultra wideband (UWB) testing.

Application Note 2008-08-10

Jitter Solutions for Telecom, Enterprise, and Digital Designs - Brochure
Complete solutions for characterization and test of jitter in high-speed digital transmission systems, high-speed I/O connections, and buses.

Brochure 2008-06-25

PDF PDF 3.49 MB
Agilent Technologies' DisplayPort Sink Test Platform Qualified by VESA

Press Materials 2008-06-02

10 Hints for Getting the Most from your Frequency Counter
Maximize the results you get from your frequency counter through 10 hints from better from understanding the architecture to making faster measurements.

Application Note 2008-04-18

Precision Waveform Analysis for High-Speed Digital Communications Technical Overview
his document will discuss the Keysight 86108A precision waveform analyzer plug-in module with the Keysight 86100C DCA-J sampling oscilloscope mainframe for accurate analysis of high-speed digital communications signals.

Application Note 2008-04-17

Agilent DigRF v3 Products & Solutions

Press Materials 2008-03-03

Integrated Debugging-A New Approach to Troubleshooting Your Designs with Real-Time Oscilloscopes
Traditional debugging can be time consuming and inefficient. With Keysight Infiniium oscilloscopes, “integrated debugging” is a reality, and it leads you directly to the root cause of problems.

Application Note 2008-01-30

Exploring The Test Requirements For DisplayPort Receivers
Exploring The Test Requirements For DisplayPort Receivers

Article 2008-01-28

PDF PDF 543 Bytes
DDR 1, 2 and 3 solutions Video
Includes probing methods, read/write separation technique and automated JEDEC compliance measurements with Infiniium Series oscilloscopes.

Demo 2007-12-27

WMF WMF 52.75 KB
Agilent Technologies Improves Industry's First DisplayPort Source Compliance, Characterization Test

Press Materials 2007-12-05

10 Reasons to Upgrade to a 16800 or 16900 Series Logic Analyzer
10 Reasons to Upgrade to a 16800 or 16900 Series Logic Analyzer

Application Note 2007-12-03

Method of Implementation (MOI) for DisplayPort - Application Note
Keysight Method of Implementation (MOI) for DisplayPort Sink Compliance Tests

Application Note 2007-11-03

PDF PDF 1.99 MB
Agilent Technologies and Fujitsu Microelectronics Pacific Asia Ltd. to Deliver Chipset Test Solution

Press Materials 2007-10-24

Complete solutions for characterization, debug, compliance test of HDMI designs - Brochure
This brochure discusses test solutions for HDMI. Thorough characterization and validation of HDMI-based designs

Brochure 2007-10-19

PDF PDF 1.12 MB

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