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DigRF Test Solutions Brochure
Gain greater confidence in your DigRF designs.

Brochure 2009-09-11

PDF PDF 2.18 MB
Testing of RF ICs with DigRF Interconnects - Application Note
Testing of RF ICs with DigRF Interconnects

Application Note 2009-09-11

Keysight MOI for SATA TXRX Tests Using Keysight 86100C TDR

Application Note 2009-09-10

PDF PDF 479 KB
Agilent Technologies Broadens SAS, SATA Test Portfolio through Partnership with SerialTek

Press Materials 2009-09-09

Preselector Tuning for Amplitude Accuracy in Microwave Spectrum Analysis
This 8 page application note introduces the technique for broadband modulated signals employed in the new MXA signal analyzer.

Application Note 2009-08-14

Solutions for HDMI Test - Brochure
Keysight Solutions for HDMI Test Thorough characterization and validation of HDMI-based designs

Brochure 2009-06-10

PDF PDF 1.17 MB
Mixed Analog & Digital Signal Debug and Analysis Using a Mixed-Signal Oscilloscope
Using a mixed analog and digital 32 bit WLAN application example, this note shows how an MSO with deep memory makes debugging today’s mixed analog and digital designs easier than ever before.

Application Note 2009-06-01

Using the Keysight Infiniium Series Real-time Oscilloscope to Validate the DigRF
The DigRF v3 standard presents new digital hardware validation challenges for mobile wireless development as the links between the baseband (BB) ICs and the radio frequency (RF) ICs transition from an analog interface to a digital interface.

Application Note 2009-05-27

Advanced Design System Element Brochures
ADS 2009 includes a number of powerful simulation elements.

Selection Guide 2009-04-02

Signal Integrity Simulation of PCI Express Gen 2 Channel
Article reprint from XrossTalk Magazine, Janurary 2009, author Jason Boh.

Article 2009-03-23

PDF PDF 1.81 MB
Inphi Delivers Memory Interface Chip for DDR3-1600 Using Advanced Design System
This Success Story details how Inphi delivered memory interface chip for DDR3-1600 using Keysight’s Advance Design System (ADS).

Case Study 2009-03-12

PDF PDF 196 KB
N1080A HDMI Test Point Access Adapters
This flyer describes the N1080A HDMI Test Point Access Adapters and their use with HDMI Standards.

Data Sheet 2009-02-24

Improving the Accuracy of Optical Transceiver Extinction Ratio Measurements (AN 1550-9)
This paper discusses extinction ratio - measurement challenges and causes of measurement uncertainty & variability. In addition, it describes methods for reducing uncertainties caused by non-ideal performance of standard reference receivers.

Application Note 2009-02-21

Using Equalization Techniques on Your Infiniium 90000A Series Oscilloscope
A transmitter sends a serial signal over a transmission channel (examples: backplane, cable) to a receiver. As the signal rate increases, the channel the signal travels through distorts the signal at the receiver.

Application Note 2009-02-17

Hurdle the Gigabit-Per-Second Barrier
Overview of Keysight's Advanced Design System for Signal Integrity Analysis

Technical Overview 2009-02-12

PDF PDF 234 KB
Agilent Technologies Introduces Million-Bit-Per-Minute Channel Simulator for Signal Integrity

Press Materials 2009-02-03

DDR Probing for Physical Layer and Functional Testing
Probing is the key to accessing signals and validating your designs. Although you may normally probe at signal vias or designed-in probe points, for DDR these do not always provide good signal integrity.

Application Note 2008-12-19

PDF PDF 617 KB
Debugging Signal Integrity and Protocol Layers on DDR Designs
As DDR data transmission rates increase, signal integrity and clarity become critical concerns. So one of the primary challenges with DDR is debugging failures.

Application Note 2008-12-19

PDF PDF 984 KB
Find and identify the causes of data corruption and elusive failures
The Protocol-decode software allows you to track and fix infrequent glitches and other signal anomalies that might otherwise be difficult to find.

Application Note 2008-12-19

PDF PDF 360 KB
Separating Read/Write Signals for DDR DRAM and Controller Validation
To analyze the signal integrity of DDR signals, you need to differentiate the complex traffic on the data bus to independently analyze the signal performance for both DDR chip and memory controller.

Application Note 2008-12-19

PDF PDF 805 KB
Ensuring Compliance and Interoperability of DDR Designs
The Joint Electronic Devices Engineering Council (JEDEC) specification requires a large number of test parameters to be verified for DDR compliance – a time-consuming exercise if you make the measurements manually.

Application Note 2008-12-19

PDF PDF 379 KB
PCI Express® Revision 2 - Receiver Testing With J-BERT N4903A and 81150A Pulse - Application Note
Receiver Testing With J-BERT N4903A and 81150A Pulse

Application Note 2008-12-03

PDF PDF 1000 KB
Boosting PLL Design Efficiency From free-running VCO characterizations to closed-loop PLL evaluation
This application note describes introduces practical solutions for VCO/PLL performance evaluation and gives actual examples of parameter measurements using the E5052B.

Application Note 2008-11-21

Characterizing Clock Jitter through Phase Noise Measurements Speeds up Design Verification Process
This white paper discusses a new measurement method for obtaining highly accurate low random jitter (RJ) measurements and performing real-time analysis of RJ and periodic jitter (PJ) of components.

Application Note 2008-11-20

Upgrade to PCI Express 2.0© Receiver Test - Application Note
The 15431A is a filter set for the 81150A. It generates the random jitter profile for testing PCI Express 2.0 receivers, to be used in conjunction with the N4903A. This fact sheet explains the upgrade.

Application Note 2008-10-24

PDF PDF 348 KB

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