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Modifying DDR Libraries for Silicon Nail Test Generation on the Keysight x1149 Boundary Scan Analyzer
This application note describes how to modify DDR libraries to generate silicon nails tests on the Keysight x1149 Boundary Scan Analyzer.

Application Note 2014-08-03

PDF PDF 1.57 MB
Offline vs Inline: Shifting to automated inline ICT - White Paper
This paper discusses the benefits of adopting an inline in-circuit test strategy for electronics manufacturers looking to increase product quality and reliability while ensuring optimal ROIC.

Application Note 2014-05-14

Testing Automotive Fuse Boxes with i1000D SFP In-Circuit Test System - Application Note
The i1000D small footprint in-circuit tester provides excellent test coverage for automotive fuse boxes, which contain vital connections to a vehicle's various electrical systems.

Application Note 2014-03-26

Testplan Development on CVI Labwindows with TS-5400 PXI Series - Application Note
This application note provides set-up guidelines to start developing your testplan on CVI Labwindows using the Keysight U8972A TS-5400 PXI Series functional test system.

Application Note 2014-03-25

PDF PDF 5.09 MB
Problem with Subtype Learning When Used with the Connector Algorithm in R7.0
5DX Technical Paper - Problem with Subtype Learning When Used with the Connector Algorithm in R7.0

Application Note 2013-10-29

PDF PDF 16 KB
Building Hybrid Test Systems. Ensuring success in two common development scenarios - Application Not
Application Note 1465-33. When you migrate to a hybrid system that includes LXI along with GPIB, VXI, PXI, or any other architecture, two scenarios are most typical, minimum development time and maximum overall performance

Application Note 2008-10-15

High Node Count Fixturing Solutions for Keysight Short-Wire Test Fixtures
This paper discusses problems encountered in building large, high node count vacuum actuated test fixtures for the Keysight 3070 family of board test systems.

Application Note 2008-04-30

PDF PDF 67 KB
Maximising Test Coverage with Keysight Medalist VTEP v2.0
This paper describes how to get the most from Keysight Technologies’ industry-leading vectorless test innovation, the Medalist VTEP v2.0 which is a suite of solution comprising VTEP, iVTEP and NPM.

Application Note 2007-04-17

Life and Stability of the Keysight 5DX Sealed X-ray Tube
Keysight has developed a sealed ultra-high vacuum X-ray tube that provides stable output throughout a significantly long life.

Application Note 2007-01-22

PDF PDF 78 KB
Considerations for Surface Map Setup
The concept of delta-Zs is perhaps the most difficult thing to understand about the surface map process.

Application Note 2006-08-08

AOI - A Strategy for Closing the Loop
This paper describes a set of defect prevention solutions centered on the availability of high-quality inspection and measurements data from an AOI system and a few carefully engineered software applications

Application Note 2006-04-16

PDF PDF 291 KB
“Shotgunning”, a Bad Fit for Lead-Free Test
Shotgunning, a common repair technique in functional test, will be negatively affected by lead-free processes. This article explores the technique and draws broad conclusions regarding the impact of lead-free on electronics manufacturing test

Application Note 2006-02-07

PDF PDF 44 KB
In-circuit Testing of Low Voltage Devices
Core technical document summarizing issues regarding the testing of low voltage devices on the 3070 and i5000, including updated Safeguard information.

Application Note 2005-05-25

PDF PDF 172 KB
Gauge Repeatability on 5DX X-ray System
Summary of 5DX repeatability capability, factors that influence the repeatability capabilities of the 5DX, impacts to gauge repeatability and reproducibility (GR&R) results.

Application Note 2005-03-09

PDF PDF 102 KB
Test and Inspection as Part of the Lead-free Manufacturing Process
The paper addresses issues that will impact defect levels and defect spectrum during the transition to lead-free manufacturing. It also addresses different test and inspection systems’ readiness to test lead-free printed circuit board assemblies.

Application Note 2005-02-22

PDF PDF 421 KB
Testing FPGullwing Misalignment Across the Pad
A technique is described which enables detection of misalignment of gullwing joints across the joint using duplicate components and FPGullwing Misalignment.

Application Note 2004-12-08

PDF PDF 1.58 MB
Understanding the PCAP Polarity Reject Signal
This paper describes the algorithm used to determine if polarized capacitors are properly oriented.

Application Note 2004-12-02

PDF PDF 1.09 MB
Handling Surface Mapping with Varying Board Construction
This paper describes a method for dealing with lot-to-lot or supplier-to-supplier variations in board construction. Often the variations in board construction result in different color boards which otherwise cause problems with surface mapping.

Application Note 2004-12-02

PDF PDF 1.02 MB
Understanding and Configuring the 5DX Selftest and Black/White Level Tests
This paper discusses the theory and practice of 5DX automatic compensation tools, Selftest and gray level correction.

Application Note 2004-12-01

PDF PDF 158 KB
How and Why: Confirmation and Adjustments
This paper describes the process of and reason for periodic adjustment of a 5DX system using the confirmation and adjustment panel.

Application Note 2004-12-01

PDF PDF 636 KB
Instructions for Using One Confirmation and Adjustment Panel with Multiple Systems
Readjusting the thickness table setting for one machine, using the Confirmation and Adjustment Panel, and adjustment data for a second machine, improves the portability of applications between the two machines.

Application Note 2004-08-26

The Importance of Test and Inspection When Implementing Lead-Free Manufacturing
Many papers, articles, and studies have been written about process issues, reliability issues, repair issues, and the merits of different alloys. This paper addresses the impacts on test and inspection when going lead-free.

Application Note 2004-08-20

PDF PDF 260 KB
Using Lead-Free PCB Finishes at Manufacturing In-circuit Test Stage
The purpose of this document is to share experiences and educate engineers regarding different PCB surface finishes and the specific changes required in the PCB build process to allow for ICT.

Application Note 2004-08-08

PDF PDF 102 KB
Solder Paste Inspection - Organize the Pieces
Published in Global SMT & Packaging, November 2003

Application Note 2003-11-01

PDF PDF 818 KB
Realizing the Benefits of 3D Inline Solder Paste Inspection
Published in SMT Magazine/Germany, August 2003

Application Note 2003-08-01

PDF PDF 67 KB

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