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Using ADS to Investigate Optimal Performance of a Cree FET
This application note documents a workspace that shows how to apply ADS load pull simulations to attain optimal performance of a Cree FET.

Notes d’application 2014-03-17

PDF PDF 5.41 MB
Agilent Technologies Announces Next-Generation System for Measuring Flicker Noise
Agilent introduces the Agilent EEsof EDA E4727A Advanced Low-Frequency Noise Analyzer—a next-generation hardware and software system for measurement and analysis of flicker noise and random telegraph noise (RTN).

Dossier de presse 2014-03-13

ADS 30-Second Demos
Watch these videos to learn about popular usability improvements we’ve made in Advanced Design System (ADS) to increase your productivity.

Démonstration de base 2014-03-06

Agilent Technologies Unveils New 30-Second Demo Series of User-Inspired ADS 2014 Innovations
Agilent announces the launch of a new series of 30-second demos on user-inspired innovations to its Advanced Design System 2014 software, the industry’s leading electronic design automation software for RF, microwave and signal-integrity applications.

Dossier de presse 2014-03-06

EMPro 3D EM Simulation Platform Support Roadmap
Keysight EEsof EDA EMPro 3D EM Simulation platform support roadmap

Guide de sélection 2014-03-06

PDF PDF 100 KB
Genesys Brochure and Configuration Guide
12-page Genesys color brochure and configuration guide. Provides information to help with purchasing decisions and justifications.

Brochure 2014-03-04

PDF PDF 2.10 MB
Agilent Software Gives Students Edge in Job Market
Design tools are getting University of Arizona engineering students certifiably ready for work in the RF and microwave industry.

Dossier de presse 2014-02-24

ADS 2014 Dramatically Improves Design Productivity and Efficiency
Agilent announces a powerful new version of Advanced Design System software, ADS 2014. Designed to dramatically improve design productivity and efficiency with new technologies and capabilities, ADS 2014 is the software's most significant ADS release to date.

Dossier de presse 2014-02-20

Digital Design & Interconnect Standards - Brochure
Brochure shows Keysight’s high-speed digital solution set , a range of essential tools, measurement and simulation—that will help cut through the challenges of gigabit digital designs.

Brochure 2014-02-20

PDF PDF 6.47 MB
Mechanism of Jitter Amplification in Clock Channels
In this paper. jitter amplification in clock channels is analyzed analytically using the techniques developed in "Frequency domain analysis of jitter amplification in clock channels."

Article 2014-02-18

PDF PDF 671 KB
Touchstone v2.0 SI/PI S-Parameter Models for Simultaneous Switching Noise (SSN) Analysis of DDR4
This paper presents a methodology to setup and analyze Simultaneous Switching Noise for DDR4 applications using Touchstone v2.0 models.

Article 2014-02-18

PDF PDF 8.07 MB
De-Mystifying the 28 Gb/s PCB Channel: Design to Measurement
This paper demonstrates a design methodology for 28 Gb/s SERDES channels using Xilinx Virtex-7 Tx to show the required trade-offs that enable robust performance that is easy to verify with measurement.

Article 2014-02-18

PDF PDF 2.99 MB
Modeling, Extraction and Verification of VCSEL Model for Optical IBIS AMI
A technique of modeling and extraction of VCSEL devices for IBIS-AMI has been proposed.

Article 2014-02-18

PDF PDF 947 KB
Tips and Advanced Techniques for Characterizing a 28 Gb/s Transceiver
This paper shows the right combination of measurement and simulation techniques, and how the previously existing barriers for using de-embedding have been eliminated.

Article 2014-02-18

PDF PDF 3.82 MB
Improving IBIS-AMI Model Accuracy: Model-to-Model and Model-to-Lab Correlation Case Studies
This paper presents case studies for model-to-model & model-to-lab correlation methods & compares favorable/unfavorable factors for both methods. 10G, 11.5G and 23G SerDes data are used as examples.

Article 2014-02-18

PDF PDF 3.28 MB
IBIS AMI Modeling of Retimer and Performance Analysis of Retimer based Active Serial Links
This paper presents a novel retimer modeling approach based on IBIS-AMI to capture the performance of a retimer that operates up to 15 Gbps.

Article 2014-02-18

PDF PDF 1.78 MB
Agilent Technologies Simulation and Modeling Software Selected by Nitronex for High-Power GaN Design
Agilent announces that Nitronex, a GaAs labs company and leading producer of GaN-on-silicon RF power devices, has selected Agilent to provide a complete GaN design flow that spans both device modeling and circuit simulation.

Dossier de presse 2014-02-11

Sanjay Gangal of EDACafé interviews Colin Warwick on New SI and EM Products at Designcon 2014
Sanjay Gangal, V.P. Sales & Marketing at EDACafé interviews Colin Warwick, Product Manager at Keysight Technologies, at Designcon 2014, .

Démonstration de base 2014-02-04

Agilent Technologies’ LinkedIn ADS User Group Tops 3,000 Members
Agilent announces that the Agilent EEsof EDA Advanced Design System (ADS) user group on LinkedIn now has over 3,000 members.

Dossier de presse 2014-02-03

Overcoming the Challenges of Designing and Testing Phased-Array Radar Systems
Microwave Product Digest (MPD) featured article for January 2014 written by Dingqing Lu of Agilent Technologies.

Article 2014-01-27

ADS Controlled Impedance Line Designer Solves Key Challenges in Designing Chip-to-Chip Links
Agilent introduces Agilent EEsof EDA’s Controlled Impedance Line Designer. The software product quickly and accurately optimizes stack up and line geometry for multigigabit-per-second chip-to-chip links, using the most relevant metric.

Dossier de presse 2014-01-27

W2307EP/ET Controlled-Impedance Line Designer (CILD)
The W2307EP Controlled-Impedance Line Designer enables you to optimize your PCB stack up and transmission line geometry using metrics that matter, namely post-equalizer eye diagram parameters.

Fiche signalétique 2014-01-23

Agilent Technologies to Exhibit Digital Design and Test Solutions at DesignCon 2014
Agilent announced it will exhibit its high-speed digital solutions shown at DesignCon 2014, Jan. 29-30, Booth 201, in Santa Clara. The products offer a wide range of essential tools to help engineers design, simulate, analyze, debug and achieve compliant designs while meeting the challenges of gigabit digital designs.

Dossier de presse 2014-01-22

Quick Start for Signal Integrity Design Using Advanced Design System (ADS)
This demo guide is a part of the high-speed digital design workflow for signal integrity engineers using Advanced Design System.

Présentation technique 2014-01-20

PDF PDF 3.80 MB
GoldenGate Software Release Brings Wireless Standard-Compliant Design into RFIC Designers’ Hands
Agilent announces the latest release of GoldenGate, its RFIC simulation, verification and analysis software.

Dossier de presse 2014-01-06

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