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Advanced Design System 2011 Updates

Advanced Design System 2011The table below displays a list of features/capabilities that have been added or improved in Advanced Design System 2011. The table includes information for the main ADS 2011.01 release as well as the ADS 2011.05 release.

For more information on ADS 2011, refer to:

For information on the latest available software downloads, refer to ADS Latest Software Downloads.

 

Use the table below to find the ADS release used to deliver the product features/capabilities that have been added/improved. 

Last Updated: 07 October 2011

Advanced Design System 2011 Updates Table      
Product feature/capability added or improved ADS 2011.01 ADS 2011.05 ADS 2011.10
NEW Industry's First Complete Multi-Technology Design Platform Check    

NEW Library construct

  • Easily organize designs into different technology groupings
  • Prevents component name collisions between PDK's
  • Eliminates conflicts between PDK AEL customization
  • Makes it easy to utilize other designs or reference libraries
Check    

NEW Graphical Layer Editor

  • Single location to define layers, material properties, and stackup definition
  • Easily drag and drop elements in the substrate definition
  • Graphical representation makes it easier to validate stackup definition
  • Easier, faster with less chance of errors
Check    

NEW Easily combine multiple substrate technologies

  • Other technologies are easily combined within the Graphical Layer Editor
  • Combine IC in a Package or Module; Module on a PCB; etc.
  • Supports multiple stacking levels (i.e., IC on Module on PCB)
  • Supports flip chip, wire bonding, and backside mounting
  • No design flattening or layer modification required
  • Fully visualized in Layout and 3D Viewer
  • Can perform Momentum and FEM simulations on multi-substrate structures
Check    
NEW Use Model for EM Simulations Check    

Single EM simulation setup window replaces eight previous dialogs (used in ADS 2009 update 1 and previous versions)

  • Makes EM simulation setup easier, faster, and more accessible, requiring fewer mouse clicks
Check    

Reusable EM setups

  • Easy to save and restore EM setups
  • Can be provided by foundries and EM experts
Check    
EM models are fully compatible with the new dynamic model selection Check    
Unified use model for Momentum, Momentum RF and FEM Check    
EM Simulation toolbar provides shortcuts to frequently used menus Check    
Job manager provides improved ease-of-use for monitoring multiple local, remote, queued or distributed simulations Check    
NEW EM Simulation Features Check    
Improved EM Port View now includes port editing capabilities Check    
Momentum dataset stores port, pin, and net names for easier interpretation of the S-parameters Check    

Improved Momentum performance

  • New mesher (now with quadrangular cells) provides better convergence and speed
  • NlogN matrix load algorithm
Check    

Improved Wirebond support

  • NEW Wirebonds can now be included in Momentum simulation
  • Shape bondwire and Jedec bondwire can now be easily edited in Layout
Check    

Improved Momentum modeling for even more accuracy

  • Improved dielectric loss model (Svensson/Djordjevic)
  • NEW Conductor Surface Roughness model
  • NEW Calibration types: TML with zero length, SMD and delta-gap
Check    
NEW Advanced Model Composer can now generate a scalable EM model based on FEM simulations  Check    
NEW Circuit Simulation Capabilities Check    

NEW "View" construct simplifies simulation

  • Easily manage different representations of the design
  • NEW Dynamic Simulation Model Selection makes it easy to change the simulation model without modifying the schematic
  • NEW Easily create different simulation model policies to control model selection through design hierarchy
  • Provides simulation flexibility while simplifying schematics
Check    

NEW Load Pull Data Controller

  • Quickly imports one or more Maury load pull files
  • Component used directly in designing matching network
  • Easier design optimization
  • Automatic interpolation of scattered measurement data
  • Automatically display performance parameters
  • Much faster to go from load pull data to doing design and simulation
Check    
NEW Matlab Output component to filter and output simulation results directly to a Matlab file Check    
Improved simulation performance of fully linear circuits Check    

Improved Transmission line models (including multi-layer library models)

  • More accurate broad-band skin effect calculation
  • NEW advanced method of calculating surface roughness loss
  • More accurate calculation of Power/Ground plane loss
Check    
Support for TSMC Safe Operating Area (SOA) Check    
Improved Capability for Data Display Check    

Improved Smith Chart

  • Better display of chart values
  • Better overall look and data granularity
  • More efficient memory utilization
Check    

Improved Data Display Template Browser

  • Real time quick search
  • Template properties can now be directly edited from the Browser
  • Improved Save As and Delete from the Browser
Check    

More control in setting Data Display trace colors

  • Can now assign a color to a family of subtraces
  • Easier to differentiate traces belonging to different sweeps
Check    
Improved Usability for Layout and Schematic Check    

NEW Object handles improves editing efficiency

  • Selecting an object displays handles for edges, vertices, rotation, move, endpoints, and component text
  • Instantly perform the most common editing operations
  • Use with Arcs, Circles, Paths, Polygons, Polylines, Rectangles, Text, Traces, Wires, Transmission Lines, Annotations, Wire Labels, Rulers, Dimension Lines, Wirebonds (JBOND, SBOND), …
  • Infrastructure available to end users for PDK and other customization
Check    

NEW Flexible design data structures

  • Consistent with the most common EDA design tools
  • NEW Workspace
    • Provides a personal project organization space
    • Simplifies preference settings storage
  • NEW Libraries
    • Makes it easy to use multiple technologies
    • Makes it easier to share design IP
    • Eliminates component name collisions
    • Simplifies technology definition and PDK development
  • NEW Cells and Views
    • Cells provide single entity to represent a design object
    • Views capture different representations of the Cell design object
    • Standard built-in Views (schematic, layout, symbol, EM)
    • Users can create View names to represent their own design variants
    • Same structure that is used the most common EDA tools
Check    

NEW Alignment functions

  • Easily align selected objects
    • Align Left, Right, Top, Bottom, Center Vertical, Center Horizontal
Check    

NEW Layout toolbar (beta version)

  • Provides single click access to commonly used functions such as vertex selection control, pin number display, etc.
  • Quick access to new alignment functions
Check    

NEW Command Line (beta version)

  • Optimized for efficient keyboard entry of commands
  • Over 50 common commands currently defined
  • User can add their own custom functions
Check    

NEW Extended layer definition

  • Layer definition is now made up of a layer number and a purpose description
  • Makes it easy to have a layer (like Metal1) where you want to differentiate the display (like RF, bias, digital, etc.)
  • Maps perfectly to GDSII layer definitions
  • Consistent with Cadence Virtuoso and other common layout tools
Check    

NEW Array Ref object (AREF)

  • Can create an array of a single Layout object
  • Can be orders of magnitude smaller memory footprint
  • Same element found in many of the large layout tools
Check    

NEW Graphical facelift for toolbar icons

  • Same familiar designs with updated graphics
Check    
You can now set the default cursor to be crosshairs instead of the arrow Check    
When entering a rectangle, you can now press the CTRL key and the first point will set the center of the rectangle and the second point will set the corner of the rectangle Check    
NEW Features for Wireless Libraries Check    

NEW feature in CMMB library

  • NEW LDPC Encoder
Check    

NEW feature in LTE library

  • Support LTE version 8.9.0 (Dec 2009)
  • NEW examples for User Equipment and Base Station radio transmission and reception RF tests
  • NEW LTE downlink test models for both FDD and TDD
  • NEW EVM models which are consistent with Keysight VSA 89600 software Version 12
Check    

NEW feature in HSPA library

  • Support large transport block (TB) for HSDPA
Check    
Advances in High Speed Digital Design including Signal Integrity and Power Integrity Check    

The new capabilities in EM simulation listed above (Use Model for EM Simulations and EM Simulation Features) enable power integrity simulations with Momentum

  • SI/PI analyzer wizard with net-driven set up
  • NEW Hybrid fitting/convolution option for using EM results with Transient and Channel Simulator. This option is especially suited to frequency responses with low frequency structure as typically occurs in power distribution networks (PDNs)
Check    
IBIS-AMI model simulation and Design Guide Check    
8B10B statistical encoding support Check    
Improved conductor surface roughness modeling accuracy at higher frequencies Check    
W-element generation from Multilayer library model simulations Check    
NEW "Signal Integrity - Common Components" palette for quick access to frequently used SI/PI components Check    
Models & Libraries Check    

Models

  • NXP SiMKit 3.4 integration
  • PSP 102.3.4 and 103.1.1 models
  • Mextram 504.8 model
  • BSIMSOI 4.3.0 model
  • BSIM 4.6.5 model
  • HiSIM_HV 1.2.0 model
  • MOSVAR 1.1 model
  • R3 model
  • PSPICE diode model
Check    

User Compiled Models

  • Simplified User Interface
  • C++ compiler support
  • Support for a varying number of external nodes
  • Support of repeated parameters
  • Parameter support of vector values
Check    
Translators and Links Check    

Full IFF for Cadence Allegro link now delivered with the ADS release

  • Now provides parametric schematic and layout transfer between the two tools
  • Automatically maintains parameter settings for transmission line elements and allows changing parameters in either tool
  • Includes component library synchronization utility
  • Requires optional product from Cadence
Check    
Text is exported faithfully from ADS to Gerber and ODB++ files Check    
Drill file can be exported independently of Gerber file for a layer Check    
Simulation performance improvement for large X-parameter files   Check  
Printing and PDF output improvements for Schematic, Layout, and Data Display   Check  
One-click HSPICE encryption simplifies generation of IP-protected IC models   Check  
GDSII Export simplified and automated layer mapping capability   Check  
Gerber Union Support for customers who still require W2322 Gerber Union Element in their design flow   Check  
Support for 64-bit versions of Solaris 10   Check  
Over 160 customer requested improvements and enhancements   Check  

EM Enhancements

A new Boundary Layer drawing object

  • Simplifies the definition of finite structures (such as the extent of an IC)
  • Makes it easier to define the substrate for FEM
  • Single substrate definition that for both FEM and Momentum.
    Check

Momentum

New technology for generating certain types structures

  • New in-line Boolean operations (Derived Layers) used as part of the substrate definition
  • Simplifies air bridge technology setup
  • Easier and faster creation of air bridges by the designer
  • Can be used to simplify via arrays into a single via
  • Can be used to define variable depth vias
     Check

FEM

  • New auto edge mesh feature improves accuracy and convergence speed
  • Multi-threaded iterative solver - 2X increase in performance on a 4 core system
     Check

Artwork Translators

Improved ODB++ import

  • Support for component reference designators, footprints, and locations
  • Import PCB netnames

Simplified import process

  • Import function is now available from the ADS main window
  • No longer requires definition of empty layout
  • Works for GDSII, DXF, Gerber, ODB++ and Mask
     Check

PDE

Re-designed Help system

  • Faster start up and performance
  • New contents browsing window
  • New bookmark capability, improved search and index

New Application Guides

  • Provide complete front to back guidance for typical circuits
  • Provides example Workspace with the designs and technology definition

New Design Documentation Notebook

  • Multi-page printing and file generation
  • Drag and drop schematics, layouts, data displays, etc. into a Notebook
  • Supports PDF and Postscript file formats
     Check

Layout

New Layout Toolbar

  • Provides object filters for easier selection
  • Enables specific select modes
  • Control visibility of pin annotations
  • Control entry angle modes

Improved Physical Connectivity Engine

  • Now displays connectivity through the design hierarchy
  • Improved display of physical connectivity
  • Nodal connectivity and physical connectivity are displayed with different colors
     Check

PDK and Technology Definition

PDKs created natively in 2011.10

  • Take advantage of new features in 2011 releases (layer purpose pairs, multiple component views, Default Design directory, etc.)
  • No longer requires converting a 2009 PDK
  • Fully documented process
  • SampleKit provides a working example
     Check

Graphical Cell Compiler

  • Now define GCC components natively in the 2011.10 release
  • Does not require a conversion from ADS 2009

Simplified multi-technology definition

  • Improved dialog to define metal layers for nested technologies
  • Only the relevant conductor layers are displayed
  • Checkbox makes selection quick and easy
    Check

Desktop LVS Enhancements

  • Non-physical wire objects in Layout are now flagged
  • Drag and drop missing components directly from the LVS viewer into the schematic or layout
  • Pin neutrality eliminates false flags for two pin components
     Check

Desktop DRC Enhancements

  • Easier to organize and manage multiple DRC rules files
  • Can now mark (with a checkbox) arbitrary errors and move them to the fixed category
  • Can now bring back the DRC summary report at any time
     Check

Simulation Enhancements

Support for new models

  • BSIMSOI 4.3.1
  • BSIMSOI 4.4
  • HICUM L0 V 1.3
  • HICUM L2 V2.3

Improved Linear Simulation Performance

  • Improved Linear Network Collapser controller
  • 4X improvement over previous version
  • Up to 10X improvement over not using the Collapser
    • Will work with Linear, AC, and in some cases HB simulations
    Check

DesignGuides

Improved Load Pull DesignGuide:

  • Can now specify the load or source reflection coefficient as a rectangular grid
  • The ability to plot the contours at a user-specified output power or gain compression
  • Compute gain compression relative to the maximum gain point
  • Ability to simulate performances versus the phase of the load or source reflection coefficient at a harmonic frequency
  • Add contour plots on rectangular impedance plots
  • More easily test a circuit performance data at a particular output power or level of gain compression
     Check

Signal Processing

  • ADS Support for VSA 89601B Glacier B
    Check

High Speed Digital

Improved Net Explorer tool

  • Displays netnames imported from PCB tools
  • Also displays ADS netnames
  • Easily select and highlight specific nets in Layout
  • Display selected nets in 3D Viewer
  • Auto generate cut line around selected nets
  • Perform cookie cutter operation to simplify EM simulation

Other HSD improvements

  • Support for IBIS series Models in ADS
  • New wiire via model provides enhanced simulation performance
  • Re-driver and re-timer modeling
  • 3× speed improvement in through use of impulse response caching
    Check
Ship Date (month/year)

Mar
2011

Jun
2011

Nov
2011

* "X-parameters" is a trademark of Keysight Technologies, Inc. The X-parameter format and underlying equations are open and documented. For more information, click here.