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DDR Memory Design & Test

Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) is implemented in several forms today:

  • DDR, DDR1, DDR2, DDR3, DDR4 – advancing generations of DDR technology with progressively faster data rates and clock frequencies
  • LPDDR, LPDDR2, LPDDR3, LPDDR4 – generations of low-power DDR targeted for mobile devices
  • GDDR5 – graphical DDR targeted for graphics boards
  • UFS – universal flash storage, the next generation of mobile storage

Keysight’s solutions for DDR memory applications are driven and supported by Keysight experts that are active in the Joint Electronic Devices Engineering Council (JEDEC). Our involvement in standards groups and their related workshops, and specification development enables Keysight to bring the right solutions to the market when our customers need them.

Regardless of the DDR generation design challenges you are facing, Keysight offers a complete solution set from electrical to protocol. Work with Keysight and gain insights for your best design.

See measurement solution examples to discover specific solutions for your DDR and memory needs.
 

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DesignCon 2015 
Jan 27-29, 2014; Santa Clara Convention Center

Tradeshow

 
Best practices in implementing boundary scan on limited access boards 
Original broadcast December 18, 2014

Webcast - recorded

 
Boundary Scan Webcast Series 
Live and on-demand webcasts

Webcast

 
Electronic Measurement Events in Europe, Middle East & Africa 
Electronic Measurement events in Europe, the Middle East, and Africa - seminars, trade shows, user group meetings, webcasts, tutorials and conferences.

Seminar

 
DesignCon 2015 - Keysight Papers 
The Papers Keysight is presenting or co-presenting

Tradeshow

 
Webcast: Breakthrough Insight into DDR4/LPDDR4 Memory Greater Than 2400 Mb/s! 
Live broadcast January 13, 2015; 10am PT / 1pm ET

Webcast

 
Overcoming Test Challenges of 100Gb Ethernet and Beyond Webcast 
Live broadcast January 15, 2015; 10am PT / 1pm ET

Webcast

 
Testing limited access SSD boards with boundary scan and external instruments webcast 
Original broadcast December 4, 2014

Webcast - recorded

 
Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

Webcast - recorded

 
Eventi di Keysight Italia 
Benvenuti nella pagina degli eventi di Keysight Italia

Seminar

 
PCB Materials, Simulations, and Measurements for 32 Gb/s Webcast 
Live broadcast January 22, 2015; 10am PT/1pm ET

Webcast

 
Embedded testing of Intel Haswell and Broadwell chipsets on limited access client boards webcast 
Original broadcast November 13, 2014

Webcast - recorded

 
How to Achieve Compliance to the New 1E-16 BER Contour Spec in DDR4 
Original broadcast November 6, 2014

Webcast - recorded

 
Testing DDR on limited access boards using boundary scan silicon nails 
Original broadcast October 30, 2014

Webcast - recorded

 
Maximizing test coverage of multiple limited access boards by linking multiple boundary scan chains 
Original broadcast October 9, 2014

Webcast - recorded

 
How to Optimize Your SerDes Design During the Pre-layout Phase Webcast 
Original broadcast September 25, 2014

Webcast - recorded

 
Extending boundary scan tests to improve test coverage of limited access boards webcast 
Original broadcast September 25, 2014

Webcast - recorded

 
Introduction to the Keysight x1149 Boundary Scan Analyzer Webcast 
Original broadcast August 26, 2014; 9am PT / 12pm ET

Webcast - recorded

 
Common DFT guidelines for implementing boundary scan on limited access boards webcast 
Original broadcast September 11, 2014

Webcast - recorded

 
Accelerate FPGA Debug by Applying Latest Tools and Methods Webcast 
Original broadcast June 10, 2014

Webcast - recorded

 
New Calibration Method Simplifies Measurements of Fixtured Devices Webcast 
Original broadcast July 29, 2014

Webcast - recorded

 
DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD

Tradeshow

 
Simultaneous Switching Noise Analysis in DDR4 applications using Power-Aware IBIS Models Webcast 
Original broadcast May 22, 2014

Webcast - recorded

 
EMI/EMC Analysis for High-Speed Digital Design Webcast 
Live broadcast July 24, 2014; 10am PT/1pm ET/19:00 CET

Webcast

 
Simulation-Measurement Workflow for DDR Compliance Webcast 
Original broadcast March 27, 2014

Webcast - recorded

 

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