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DisplayPort Design & Test Information Resource Center

DisplayPort is the new digital display interface for computers, monitors and home-theater systems aimed at lower implementation costs and improving video performance. As a technology, DisplayPort, is now penetrating embedded and consumer electronics applications and recently a new version, MYDP, has been proposed to be a mobile interface to televisions to stream high definition content. Specifications and compliance tests are defined by the Video Electronic Standards Association (VESA) and products are tested according to a Compliance Test Specification (CTS) and are certified at specific third party Test Houses such as Allion, Granite River Labs and China Electronics Standards Institute (CESI). While the signaling is not compatible with HDMI and DVI, DisplayPort supports an interoperability mode (Dual mode) to HDMI through a minimal cost dongle that performs level translation.

Keysight is an active member of VESA, with consistent participation in DisplayPort workshops and specification issues. The resources you find here will provide you with an overview of DisplayPort design, understand the latest measurement techniques, and illustrate design and debug approaches.

The following table shows the different standards associated with DisplayPort

  Standard DisplayPort eDP iDP MYDP
Type Box-to-Box One Unit (Laptops, Games, etc) LVDS replacement internal Portable-to-TV
Lanes 1, 2 or 4 1, 2 or 4 4 or 8 1
Bit Rate 1.62, 2.7, 5.4 1.62, 2.7, 5.4 3.24 or 3.78 1.62, 2.7, 5.4
Version V1.2a V1.3/V1.4 V1.1 V1.0

The resources you find here will provide you with an overview of DisplayPort design, understand the latest measurement techniques, and illustrate design and debug approaches. Keysight – achieve your best design.

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DesignCon 2015 
Jan 27-29, 2014; Santa Clara Convention Center

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Overcoming Test Challenges of 100Gb Ethernet and Beyond Webcast 
Live broadcast January 15, 2015; 10am PT / 1pm ET

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Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

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PCB Materials, Simulations, and Measurements for 32 Gb/s Webcast 
Live broadcast January 22, 2015; 10am PT/1pm ET

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How to Achieve Compliance to the New 1E-16 BER Contour Spec in DDR4 
Original broadcast November 6, 2014

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MIPI M-PHY, D-PHY and C-PHY Receiver Testing – Today and Tomorrow 
Original broadcast October 21, 2014

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How to Optimize Your SerDes Design During the Pre-layout Phase Webcast 
Original broadcast September 25, 2014

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HDMI Physical Layer Compliance Testing - 2.0 and Beyond Webcast 
Original broadcast September 23, 2014

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Discover Keysight’s New AWG: Highest Speed, Bandwidth & Channel Density 
Original broadcast September 10, 2014

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Advanced Oscilloscope Measurements – Utilizing Math and Measurements Capability 
Original broadcast June 3, 2014

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Do you use Oscilloscopes in the 1 GHz to 6 GHz bandwidth range? 
Original broadcast June 24, 2014

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New Calibration Method Simplifies Measurements of Fixtured Devices Webcast 
Original broadcast July 29, 2014

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DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD

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Simultaneous Switching Noise Analysis in DDR4 applications using Power-Aware IBIS Models Webcast 
Original broadcast May 22, 2014

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EMI/EMC Analysis for High-Speed Digital Design Webcast 
Live broadcast July 24, 2014; 10am PT/1pm ET/19:00 CET

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Network Analysis Back to Basics Webcast 
Recorded broadcast August 21, 2013

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Webcast: Do You Have What it Takes to Test HDMI 2.0? 
Original broadcast March 12, 2014

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Keeping up with 10G USB 3.1 Physical Layer Test Challenges Webcast 
Original broadcast January 15, 2014

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Simulation-Measurement Workflow for DDR Compliance Webcast 
Original broadcast March 27, 2014

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Fixturing and Fixture Removal for Multiport Devices with Non-Standard RF Interfaces Webcast 
Original broadcast March 11, 2014

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Fixture De-embedding Techniques for 28 Gb/s Transmitter Measurements Webcast 
Live broadcast January 23, 2014; 10am PT/1pm ET/19:00 CET

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