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Keysight Technologies Announces ADS 2016, its Latest Advanced Design System Software Release 
Keysight introduces the latest release of its powerful Advanced Design System (ADS) software, ADS 2016.

新聞資料 2016-02-04

 
Keysight EEsof EDA Newsletter - Product and Application News 
Keep tabs on the latest product and application news and review the archives of the Keysight EEsof EDA Newsletter.

新聞簡訊 2016-02-01

 
ADS Videos on YouTube 
Advanced Design System (ADS) Video Library playlist in Keysight EEsof EDA's Channel on YouTube

基本展示 2016-01-28

 
Todd Cutler: DesignCon 2016 Keysight Technologies 
Todd Cutler, general manager of Keysight EDA talks with Sean O'Kane of ChipEstmate TV at DesignCon2016.

基本展示 2016-01-26

 
Boundary Scan DFT Guidelines for Good Chain Integrity and Test Coverage - Application Note 
This application note provides some key guidelines to enable good design for testability using boundary scan.

應用手冊 2016-01-21

PDF PDF 1.99 MB
Keysight Technologies Exhibits High-Speed Digital Design, Test Solutions at DesignCon 
Keysight announces it will exhibit its high-speed digital solutions at DesignCon 2016, Santa Clara Convention Center, Booth 725, Jan. 20-21.

新聞資料 2016-01-11

 
Keysight Technologies Unveils Powerful Signal, Power Integrity Solutions for its ADS at DesignCon 
Keysight announces the launch of two electromagnetic (EM) software solutions designed to help signal integrity (SI) and power integrity (PI) engineers improve high-speed link performance in printed circuit board (PCB) designs.

新聞資料 2016-01-07

 
Minimizing Design Risk, Shortening Development Time of a Digital Transmission System 
Powerful design and simulation software provides valuable insights to help uncover and solve difficult design challenges at every stage of the design process.

案例研究 2015-12-15

PDF PDF 1.17 MB
Keysight Technologies Introduces PAM-4 Capability for its Advanced Design System Channel Simulator 
Keysight announces a four-level PAM-4 capability for the ADS Channel Simulator. The introduction of this capability further advances Keysight's leadership position in IBIS-AMI SerDes channel simulation.

新聞資料 2015-11-17

 
Configuring Lattice BSCAN2 Scan Path Linker on Keysight x1149 Boundary Scan Analyzer - App Note 
A boundary scan linker mux device links multiple boundary scan chains into one single chain or multiple chain configurations. Find out how to configure Lattice BSCAN2 scan path linkers in this paper.

應用手冊 2015-10-30

PDF PDF 6.31 MB
Signal Integrity Analysis Series Part 1: Single-Port TDR, TDR/TDT, and 2-Port TDR - Application Note 
This Application Note focuses on part 1: those which use a single-port TDR, those which use TDR/TDT, and those which use 2-port TDR.

應用手冊 2015-10-29

PDF PDF 4.33 MB
Keysight Technologies to Demonstrate Advances in Hardware, EDA Software Solutions at EPEPS 2015 
Keysight announces it will demonstrate its latest hardware and electronic design automation (EDA) software solution releases at EPEPS 2015, DoubleTree by Hilton Hotel, Booth 3, San Jose, Calif., Oct. 25-28.

新聞資料 2015-10-22

 
Heidi Barnes Interview at PCB West 2015 
Heidi Barnes talks with Sierra Circuits on signal integrity challenges when designing high-speed digital circuits on printed circuit boards (PCBs).

基本展示 2015-10-08

 
Keysight Technologies to Demonstrate Latest Simulation Software Solutions at CSICS 
Keysight announces it will demonstrate its latest RF circuit, system and 3-D electromagnetic design and electro-thermal simulation software solutions at the Compound Semiconductor IC Symposium (CSICS 2015), Sheraton New Orleans, Booth 601, New Orleans, Oct. 11-14.

新聞資料 2015-10-08

 
PAM-4 Simulation and Design of Next Generation High-Speed Digital Links 
Brief overview of simulation solutions for PAM-4 electrical signaling.

技術總覽 2015-09-17

 
Keysight EEsof EDA makes it easy to get back to school—at least virtually 
Rick Nelson, executive editor of Evaluation Engineering, visited Keysight Technologies and had this to say about Keysight EEsof EDA.

專文 2015-09-11

 
Keysight Technologies' University Educational Support Programs Now in More Than 200 Universities 
Keysight announces that more than 200 universities in North America are now participating in the Keysight EEsof EDA University Educational Support Programs, which provide several thousand students with EDA software licenses.

新聞資料 2015-08-20

 
Keysight EEsof EDA Premier Communications Design Software 
Keysight EEsof EDA premier communications design software product overview brochure.

型錄 2015-08-19

PDF PDF 1.61 MB
PCI Express® Design and Test from Electrical to Protocol - Brochure 
This brochure provides insight into how to thoroughly simulate, characterize and validate PCI Express Designs.

型錄 2015-08-17

PDF PDF 4.78 MB
Challenges extend from simulation to compliance 
Tami Pippert, Keysight Technologies’ high-speed digital marketing program manager, elaborates on how Keysight is enhancing its model generation, simulation, and data analysis technologies.

專文 2015-07-08

 
Asygn & Kalray use Keysight Simulation Tool Suite to Validate PCI Express® Gen3 Serial Links 
Keysight Technologies announces it will exhibit its PCI Express® (PCIe®) solutions at the PCI-SIG Developers Conference 2015, Booth 7, Santa Clara Convention Center, June 23-24.

新聞資料 2015-06-19

 
Keysight to Exhibit Latest PCI Express® Design, Test Solutions at PCI-SIG® Developers Conference 
Keysight Technologies announces it will exhibit its PCI Express® (PCIe®) solutions at the PCI-SIG Developers Conference 2015, Booth 7, Santa Clara Convention Center, June 23-24.

新聞資料 2015-06-16

 
How to Design for Power Integrity: Finding Power Delivery Noise Problems 
This video provides an understanding of how the voltage regulator module (VRM) interacts with the printed circuit board planes and decoupling capacitors within a power distribution network (PDN). A well designed PDN provides optimum system performance while a poorly matched designed PDN can result in poor system performance. In the extreme case, rogue waves can occur within the PDN generating much higher voltage noise levels than expected, potentially interfering with system performance or resulting in permanent damage. Recommendations for keeping the impedance flat are also provided.

使用說明影片 2015-06-05

 
Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P - Application Note 
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.

應用手冊 2015-04-24

PDF PDF 2.22 MB
Keysight's ADS PCIe, USB Compliance Test Benches Solve Simulation-Measurement Correlation Challenge 
Keysight introduces the ADS PCIe and USB Compliance Test Benches, which enable a complete workflow for SerDes engineers, from simulation of a candidate design, through measurement of the finished prototype.

新聞資料 2015-04-06

 

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