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High-Speed Digital

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In digital standards, every generational change puts new risks in your path. We see it firsthand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of. Keysight - achieve your best design.

Navigate the entire design cycle

Explore this web site for solutions within all four stages of the design cycle as well as the crucial—and integral—field of signal integrity analysis.

Explorer les vidéos YouTube 

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3D Electromagnetic Hands-On Workshop using EMPro  
Various dates and locations

Séminaire

 
Genesys Webcasts - "How-To-Design" series  
Originally broadcast in 2009. Access the 6 WebEX recordings

Webcast - enregistré

 
Innovations in EDA: Opto-Electronic Signal Integrity on Optical Fiber Chip-to-Chip Link 
Originally broadcast April 7, 2011

Webcast - enregistré

 
Innovations in EM Simulation for High Speed Digital Design 
Original broadcast Nov 18, 2010; Part of the Series: Signal Integrity for High Speed Digital Interconnects.

Webcast - enregistré

 
Oscilloscope Measurements Webcast Series 
Live and on-demand broadcasts that will teach you how to make precise measurements with its Infiniium line of real-time and sampling oscilloscopes.

Webcast

 
Overcome High Speed Digital Design Challenges Webcast Series 
Series of live and on-demand webcasts

Webcast - enregistré

 
PCI Express 3.0 Compliance - Successfully Navigating the Standard Webcast 
Original broadcast May 7, 2013

Webcast - enregistré

 
Signal Integrity Design Using Channel Simulation and EM Co-design 
The materials in this self-guided workshop will show you the “what if” design space exploration workflow that our new statistical eye diagram channel simulator enables

Présentation de séminaire 2010-04-21

 
Signal Integrity eSeminar Series Q&A: Being Successful with Fully Buffered DIMM (FBD) Designs 
The following Questions and Answers were created from the live eSeminar broadcast of January 25, 2005. You can view the archived eSeminar by going to

Présentation de séminaire 2005-01-25

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Signal Integrity: Include Post-layout PCB Artwork into your Eye Diagram and BER Contour Simulation 
Originally broadcast May 5, 2010. Part of the Series: Signal Integrity for High Speed Digital Interconnects.

Webcast - enregistré

 
Successful High Speed Digital Design with ADS, EMPro, and SystemVue 
The materials in this self-guided workshop will show you the latest high speed digital capabilites in ADS 2011.

Présentation de séminaire 2011-09-29

 
Surmounting the Challenges of 16 Gigabit Operation with PCI Express Seminar 
Santa Clara, CA - October 9, 2014

Séminaire

 
Using IBIS AMI Models as ‘Executable Data sheets’ in High Speed Digital Interconnect Simulations 
Originally broadcast Sept 9, 2010. Part of the Series: Signal Integrity for High Speed Digital Interconnects.

Webcast - enregistré