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Digital Design & Interconnect Standards

In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Keysight - Insights for your best design

Learn more about Digital Design & Interconnect solutions from Keysight. 

Keysight RF and Digital Learning Center - A commitment to learning with industry experts 
 

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New 2015 Keysight EEsof EDA Simulation Tools for Signal Integrity and Power Integrity 
In this seminar, leading Keysight EEsof EDA R&D Designers provide a first-hand look at the new HSD features for signal integrity and power integrity simulation.

Seminar Materials 2015-07-24

 
Introduction to EMI/EMC Challenges and Their Solution 
Keysight EEsof EDA presentation on how to, "Overcome High Speed Digital Design Challenges".

Seminar Materials 2014-10-14

PDF PDF 2.96 MB
New 2014 Keysight EEsof EDA Simulation Tools for Signal Integrity, Power Integrity and EMI/EMC 
In this seminar, leading Keysight EEsof EDA R&D Designers provide a first-hand look at the new HSD features for the world class ADS transient and channel convolution simulators.

Seminar Materials 2014-09-18

 
Successful High-Speed Digital Design for PC board using ADS 
A hands-on workshop on how to solve increasingly difficult signal integrity and power integrity challenges using Advanced Design System.

Seminar Materials 2014-02-27

 
Solving New High-Speed Design Challenges with ADS 2013.06 
In this seminar, leading Keysight R&D Designers provide a first-hand look at the new HSD features for the world class Advanced Design System (ADS) transient and channel convolution simulators.

Seminar Materials 2013-07-10

 
Overcome PI Challenges on Perforated Power/Groung Planes 
This presentation explains a different approach that's applicable to PI analysis on cost reduced consumer boards whose power/ground planes are perforated with signal traces.

Seminar Materials 2012-01-19

PDF PDF 2.30 MB
Overcome Signal Integrity Challenges in the multigigabit(s) Era 
When digital signals reach gigabit/s speeds, the unpredictable becomes the norm. The process of getting your project back on track starts with the best tools for the job.

Seminar Materials 2011-12-15

PDF PDF 781 KB
Overcoming Return-Path-Discontinuity in DDR3 and GDDR5 Memory-Controller Packages 
A day in the life of a Memory Architect.

Seminar Materials 2011-10-24

PDF PDF 1.86 MB
Enabling MIPI Physical Layer Test- High Speed and Characterization 

Seminar Materials 2011-10-04

 
Successful High Speed Digital Design with ADS, EMPro, and SystemVue 
The materials in this self-guided workshop will show you the latest high speed digital capabilites in ADS 2011.

Seminar Materials 2011-09-29

 
Signal Integrity Design Using Channel Simulation and EM Co-design 
The materials in this self-guided workshop will show you the “what if” design space exploration workflow that our new statistical eye diagram channel simulator enables

Seminar Materials 2010-04-21

 
ADMF: Facing the challenges of Super speed USB 3.0 Product Development  
Agilent Digital Measurement Forum (ADMF): Facing the challenges of Super speed USB Product Development

Seminar Materials 2008-11-12

PDF PDF 1.78 MB