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Digital Design & Interconnect Standards

In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Keysight - Insights for your best design

Learn more about Digital Design & Interconnect solutions from Keysight. 
 

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M8195A 65 GSa/s AWG and M8197A Multi-Channel Synchronization Module - Data Sheet 
Arbitrary waveform generator with the highest combination of speed, bandwidth and channel density. Flexible signal generation at up to 32 Gbaud.

Fiche signalétique 2016-06-03

M8085A MIPI Receiver Test Solutions - Data Sheet 
Datasheet for the M8085A plug in software for the M8070A Bit Error Ratio Test system software

Fiche signalétique 2016-04-30

PDF PDF 3.10 MB
J-BERT N4903B High-Performance Serial BERT - Data Sheet 
This is a data sheet discussing the Keysight Technologies J-BERT N4903B High-Performance Serial BERT.

Fiche signalétique 2015-08-11

B4621B for DDR2, DDR3, or DDR4 Debug and Validation - Data Sheet 
The B4621B protocol-decode software translates Translates acquired signals into easily understood bus transactions showing associated data bursts for double- edge data-rate captures up to 2.5Gb/s.

Fiche signalétique 2015-02-26

PDF PDF 837 KB
U4301A PCI Express® 3.0 Analyzer Module - Data Sheet 
Keysight's U4301A PCI Express® 3.0 analyzer module is a protocol analyzer supporting all PCIe applications from Gen1 - Gen3 and speeds from 2.5 GT/s (Gen1) - PCI 8 GT/s (Gen3), link widths X1-X16.

Fiche signalétique 2013-09-04

M9252A DigRF Host Adapter – Data Sheet 
The M9252A DigRF Host Adapter provides the serial stimulus capabilities required for the MIPITM Alliance DigRF v4-based RFIC evaluation and characterization.

Fiche signalétique 2013-08-07

PDF PDF 565 KB
B4623B Bus Decoder for LPDDR, LPDDR2, or LPDDR3 Debug and Validation - Data Sheet 
The B4623B protocol-decode software translates Translates acquired signals into easily understood bus transactions showing associated data bursts for LPDDR, LPDDR2, LPDDR3 at full bus data rates.

Fiche signalétique 2012-09-03

PDF PDF 1.03 MB