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Digital Design & Interconnect Standards

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In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Keysight - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more

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Keysight to Exhibit Latest PCI Express® Design, Test Solutions at PCI-SIG® Developers Conference 
Keysight Technologies announces it will exhibit its PCI Express® (PCIe®) solutions at the PCI-SIG Developers Conference 2015, Booth 7, Santa Clara Convention Center, June 23-24.

보도자료 2016-06-16

 
DisplayPort 1.2 Link Layer Testing - FuturePlus 
DisplayPort 1.2 Link Layer Testing Solution from FuturePlus and Keysight.

솔루션 개요 2015-06-30

 
DDR4 Protocol Analysis - FuturePlus 
DDR4 Protocol Analysis from FuturePlus and Keysight.

솔루션 개요 2015-06-30

 
Asygn & Kalray use Keysight Simulation Tool Suite to Validate PCI Express® Gen3 Serial Links 
Keysight Technologies announces it will exhibit its PCI Express® (PCIe®) solutions at the PCI-SIG Developers Conference 2015, Booth 7, Santa Clara Convention Center, June 23-24.

보도자료 2015-06-19

 
One Size Does NOT Fit All - Application Note 
This application note discusses the topic of “One Size Does NOT Fit All” and how test system configurations benefit from a choice of hardware form factors and software products.

어플리케이션 노트 2015-06-08

PDF PDF 3.34 MB
How to Design for Power Integrity: Finding Power Delivery Noise Problems 
This video provides an understanding of how the voltage regulator module (VRM) interacts with the printed circuit board planes and decoupling capacitors within a power distribution network (PDN). A well designed PDN provides optimum system performance while a poorly matched designed PDN can result in poor system performance. In the extreme case, rogue waves can occur within the PDN generating much higher voltage noise levels than expected, potentially interfering with system performance or resulting in permanent damage. Recommendations for keeping the impedance flat are also provided.

사용방법 동영상 2015-06-05

 
Keysight Method of Implementation (MOI) for PCIe 3.0 Tx/Rx Impedance and Return Loss Test 
Keysight Method of Implementation (MOI) for PCIe 3.0 Tx/Rx Impedance and Return Loss Test Using Keysight E5071C ENA Network Analyzer Option TDR

어플리케이션 노트 2015-06-05

PDF PDF 1.43 MB
Keysight EEsof EDA Newsletter - Product and Application News 
Keep tabs on the latest product and application news and review the archives of the Keysight EEsof EDA Newsletter.

뉴스레터 2015-06-01

 
Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P - Application Note 
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.

어플리케이션 노트 2015-04-24

PDF PDF 2.22 MB
Ethernet 100BASE-TX Cable Test - Test Solution Overview Using the ENA Option TDR 
This describes how to make measurements of 100BASE-TX Ethernet Cable Tests by using the Keysight E5071C ENA Option TDR.

기술 개요 2015-04-08

PDF PDF 1.90 MB
Keysight Method of Implementation (MOI) for 100BASE-TX Ethernet Cable Tests 
Keysight Method of Implementation (MOI) for 100BASE-TX Cable Tests Using Keysight E5071C ENA Option TDR

어플리케이션 노트 2015-04-07

PDF PDF 2.12 MB
Keysight's ADS PCIe, USB Compliance Test Benches Solve Simulation-Measurement Correlation Challenge 
Keysight introduces the ADS PCIe and USB Compliance Test Benches, which enable a complete workflow for SerDes engineers, from simulation of a candidate design, through measurement of the finished prototype.

보도자료 2015-04-06

 
Improving IBIS-AMI Model Accuracy: Model-to-Model and Model-to-Lab Correlation Case Studies - Articl 
This DesignCon 2014 paper presents case studies for model-to-model & model-to-lab correlation methods & compares favorable/unfavorable factors for both methods. 10G, 11.5G and 23G SerDes data are used as examples.

기사 2015-04-02

PDF PDF 3.34 MB
PCI Express Receiver Testing Responds To New Challenges - Article 
PCI Express Receiver Testing Responds To New Challenges

기사 2015-03-24

 
Keysight Technologies’ Method of Implementation Guide Supports USB 3.1, USB Type-C Connectors, Cable 
eysight Technologies, Inc. (NYSE: KEYS) today announced the availability of its Method of Implementation (MOI) guide for USB 3.1 and USB Type-C Connectors and Cable Assemblies Compliance Testing using the Keysight ENA Series network analyzer's enhanced time domain analysis option (E5071C-TDR).

보도자료 2015-03-16

 
HDMI 2.0 Source/Sink Impedance Compliance Test - Test Solution Overview Using the ENA Option TDR 
This describes how to make measurements of High-Definition Multimedia Interface (HDMI) 2.0 Source/Sink Impedance Compliance Tests by using the Keysight E5071C ENA Option TDR.

기술 개요 2015-03-12

PDF PDF 2.14 MB
Infiniium 오실로스코프용 N8827A/B PAM-4 분석 소프트웨어 – 데이터 시트 (영어) 
엄선한 Infiniium 오실로스코프용 키사이트 N8827A/B PAM-4 분석 소프트웨어는 펄스 진폭 변조(PAM) 신호의 특성을 빠르고 정확하게 분석할 수 있도록 도와줍니다.

데이터시트 2015-03-12

Analysis of Test Coupon Structures for the Extraction of High Frequency PCB Material Properties - Wh 
Exploration of the addition of Beatty series resonant impedance structures to improve the accuracy of extracting PCB material properties for the purpose of constructing 3D-EM simulations.

어플리케이션 노트 2015-03-11

PDF PDF 1.73 MB
How to Do Fixture De-embedding to Match Signal Integrity Simulations to Measurements 
This video provides a quick overview of how fixture de-embedding from measurements, or embedding into simulations is a critical step for matching simulations to measurements for physical layer Tx to Rx channels.

사용방법 동영상 2015-03-10

 
Keysight Technologies to Demonstrate Latest EMC Design, Test Tools at EMCSI Symposium 
Keysight announces it will demonstrate and discuss the latest tools and techniques on 1) EMC design and testing, and 2) signal and power integrity at the EMCSI 2015 Symposium, Santa Clara Convention Center, Booth 618, March 17-19.

보도자료 2015-03-09

 
Digital Design & Interconnect Standards - Brochure 
Brochure shows Agilent’s high-speed digital solution set , a range of essential tools, measurement and simulation—that will help cut through the challenges of gigabit digital designs.

브로셔 2015-03-09

PDF PDF 7.71 MB
N4916B De-emphasis Signal Converter - Data Sheet 
The N4916B de-emphasis signal converter enables R&D and test engineers to accurately characterize gigabit serial ports and channels. The clock doubler option is needed to analyze half-rate clock devices.

데이터시트 2015-03-05

PDF PDF 2.96 MB
Keysight Method of Implementation (MOI) for DisplayPort 1.3 Cable-Connector Assembly Compliance Test 
Keysight Method of Implementation (MOI) for DisplayPort 1.3 Cable-Connector Assembly Compliance Test Using Keysight E5071C ENA Network Analyzer Option TDR

어플리케이션 노트 2015-02-27

PDF PDF 1.62 MB
DisplayPort 1.3 Cable-Connector Compliance Test - Test Solution Overview Using the ENA Option TDR 
This describes how to make measurements of VESA DisplayPort 1.3 Cable & Connector Compliance Tests by using the Keysight E5071C ENA Option TDR.

기술 개요 2015-02-27

PDF PDF 2.17 MB
B4621B for DDR2, DDR3, or DDR4 Debug and Validation - Data Sheet 
The B4621B protocol-decode software translates Translates acquired signals into easily understood bus transactions showing associated data bursts for double- edge data-rate captures up to 2.5Gb/s.

데이터시트 2015-02-26

PDF PDF 837 KB

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