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Digital Design & Interconnect Standards

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In digital standards, every generational change puts new risks in your path. We see it first hand when creating our products and working with engineers like you. Keysight’s solution set for high-speed digital test is a combination of instrumentation and broad expertise built on our ongoing involvement with industry experts. By sharing our latest experiences, we can help anticipate challenges and accelerate your ability to create products you’ll be proud of.

Keysight - achieve your best design

Achieve signal integrity in high-speed design with these useful tools, demos, videos and more

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정렬방식:
Keysight Technologies to Present a Vision for 5G Evolution at WAMICON 2017  
Keysight experts will be at WAMICON 2017, an annual IEEE Wireless and Microwave Conference, to discuss everything from circuit-level modeling to system verification for general RF, microwave, millimeter wave for 4G, emerging 5G communications, and aerospace & defense.

보도자료 2017-04-10

 
How to Design for Power Integrity: DC-DC Converter Modeling and Simulation 
This video describes how to create an accurate DC-DC Converter measurement based model (MBM) from just a few simple measurements.

사용방법 동영상 2017-04-07

 
Keysight EEsof EDA Newsletter - Product and Application News 
Keep tabs on the latest product and application news and review the archives of the Keysight EEsof EDA Newsletter.

뉴스레터 2017-04-04

 
W1714 SystemVue AMI Modeling Kit, W1713 SystemVue SerDes Model Library  
This datasheet provides an overview of the W1714 SystemVue AMI Modeling Kit, which consists of SerDes libraries for SystemVue plus automatic IBIS AMI model generation.

데이터시트 2017-03-21

Ensuring High Signal Quality in PCIe Gen3 Channels 
This Signal Integrity Journal article written by Keysight engineer, Anil Kumar Pandey includes the challenges of maintaining transmission channel signal quality in today's PCIe Gen3 Channels.

기사 2017-03-14

 
Electronic Components Tolerance and Test Limits for In-Circuit Test - Technical Overview 
In order for all assembled components to function correctly, components are measured and analyzed electrically using the In-circuit tester to ensure its value and performance are optimal.

기술 개요 2017-03-10

PDF PDF 634 KB
Accurate Statistical-Based DDR4 Margin Estimation Using SSN Induced Jitter Model 
This paper proposes a methodology, that improves the accuracy of DDR4 statistical simulation, by using the mask correction factor.

저널 2017-03-04

 
Method of Implementation (MOI) for USB Type-C Cable/Adapter Assembly High Speed Compliance Test 
Keysight Method of Implementation (MOI) for USB Type-C to Type-C Cable, Type-C to Legacy Cable, Type-C to Legacy Adapter Assembly High Speed Compliance Test Using Keysight M937xA PXIe Multiport VNA

어플리케이션 노트 2017-02-24

PDF PDF 4.66 MB
Method of Implementation (MOI) for USB Type-C Cable Assembly Low Speed Compliance Test 
Keysight Method of Implementation (MOI) for USB Type-C to Type-C Cable Assembly Low Speed Compliance Test Using Keysight M937xA PXIe Multiport VNA

어플리케이션 노트 2017-02-24

PDF PDF 2.91 MB
Heidi Barnes: DesignCon 2017 Engineer of the Year 
EDN Network's Martin Rowe interviews Heidi Barnes, DesignCon 2017 Engineer of the Year.

기사 2017-02-23

 
Signal and Power Integrity Products & Options Summary  
Signal and Power Integrity Products & Options Summary

선택 가이드 2017-02-22

 
B4621B Bus Decoder for DDR2, DDR3, or DDR4 Debug and Validation - Data Sheet 
The B4621B protocol-decode software translates acquired signals into easily understood bus transactions showing associated data bursts for double- edge data-rate captures up to 2.5 Gb/s.

데이터시트 2017-02-21

PDF PDF 1.10 MB
Keysight Technologies Announces Heidi Barnes as the 2017 DesignCon Engineer of the Year 
Keysight is proud to announce that Heidi Barnes, a senior applications engineer for Keysight EEsof EDA's high-speed digital applications, was today announced as the 2017 DesignCon Engineer of the Year.

보도자료 2017-02-02

 
Characterization of DDR4 Receiver Sensitivity Impact on Post-equalization Eye 
DesignCon 2017 - This paper explores a new approach to analyze channel jitter beyond the traditional eye mask approach.

어플리케이션 노트 2017-01-31

PDF PDF 1.75 MB
IBIS-AMI Modeling and Simulation of Link Systems using Duobinary Signaling 
DesignCon 2017 - In this paper, an extension to the IBIS AMI standard to include duobinary signal modeling and simulation is proposed.

어플리케이션 노트 2017-01-31

PDF PDF 1.67 MB
Accurate Statistical-Based DDR4 Margin Estimation using SSN Induced Jitter Model 
DesignCon 2017 - This paper proposes a methodology, that improves the accuracy of DDR4 statistical simulation, by using a mask correction factor.

어플리케이션 노트 2017-01-31

PDF PDF 2.10 MB
Signal Integrity Analysis and Compliance Test of PCIe Gen3 Serial Channel with IBIS-AMI 
DesignCon 2017 - In this paper, signal integrity analysis and compliance testing of a complete PCIe Gen3 channel with IBIS-AMI models is presented.

어플리케이션 노트 2017-01-31

PDF PDF 1.52 MB
End-to-End System-Level Simulations with Repeaters for PCIe Gen4: A How-To Guide 
DesignCon 2017 - The paper describes how to quickly and effectively evaluate the end-to-end link performance of a PCI-Express Gen-4 link involving a Root Complex, a Repeater, and an End Point.

어플리케이션 노트 2017-01-31

PDF PDF 1.51 MB
Non-Destructive Analysis and EM Model Tuning of PCB Signal Traces using the Beatty Standard 
DesignCon 2017 - This paper shows how, using a simple resonant test structure like the Beatty standard on a PCB, it is possible to verify the as-manufactured parameters and tune the PCB simulation model.

어플리케이션 노트 2017-01-31

PDF PDF 6.02 MB
IBIS-AMI Modeling of Asynchronous High Speed Link Systems 
DesignCon 2017 - This paper proposes a modified IBIS-AMI model simulation flow for asynchronous link systems.

어플리케이션 노트 2017-01-31

PDF PDF 1.38 MB
Keysight to Address IoT, Digital, RF Test Challenges at embedded world 2017 
Keysight Technologies announces it will exhibit a number of new products at the embedded world 2017 (www.embedded-world.de/en), Stand 4-208, ECN, Nuremberg, Germany, March 14–16

보도자료 2017-01-30

 
N5393F/G PCI Express® 4.0 (Gen4) Software for Infiniium Oscilloscopes - Data Sheet 
The N5393F/G PCI Express electrical performance validation and compliance software provides accurate and automated transmitter testing devices for single and multi lane test setup reducing test time.

데이터시트 2017-01-25

PDF PDF 1008 KB
Keysight Technologies Addresses 400G/PAM-4 Test Challenges at DesignCon 2017 
See the latest design and test solutions solve today’s toughest measurement challenges and accelerate new product development.

보도자료 2017-01-17

 
HUAWEI demonstrates 112 Gb/s PAM-4 optical signal transmission with M8196A AWG 
112 Gb/s PAM-4 Optical Signal Transmission over 100-m OM4 Multimode Fiber for High-Capacity Data-Center

기사 2016-12-05

 
Simplify PAM-4 receiver test with M8040A 64Gbaud BERT – Video 
Overview of the M8040A 64Gbaud high-performance BERT for PAM-4 and NRZ. This video explains target applications and shows key capabilities and output performance.

기본 데모 2016-11-30

 

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