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Technical Experts Discuss, Demonstrate Latest EM Compatibility Techniques, SI Solutions at EMC 2017 
Keysight's electromagnetic (EM) and signal (SI) and power integrity (PI) experts will be available at the 2017 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity (EMC 2017) to discuss a range of topics.

プレス資料 2017-08-02

 
Boundary Scan DFT Guidelines for Good Chain Integrity and Test Coverage - Application Note 
This application note provides some key guidelines to enable good design for testability using boundary scan.

アプリケーション・ノート 2017-07-31

PDF PDF 1.38 MB
Keysight EEsof EDAユーザ向けメールマガジン -- しみゅレター 
キーサイトEDAソリューションの技術情報やアプリケーション情報を定期的にお知らせするEメールニュースレターです。

ニュースレター 2017-07-25

 
Infiniium Z-Series Oscilloscopes - Data Sheet 
Keysight's Infiniium Z-Series oscilloscopes feature up to 63 GHz of real-time oscilloscope bandwidth and the industry's leading noise and jitter measurement floors.

データシート 2017-07-17

Time & Frequency Domain Simulation-to-Measurement Techniques by Mike Resso 
This presentation discusses a step-by-step process that signal integrity engineers can follow to ensure their success in designing with USB Type-C devices.

デモ 2017-06-18

 
Sierra Circuits Interviews Heidi Barnes at DesignCon 
During DesignCon 2017, Sierra Circuits interviewed Heidi Barnes, Senior Applications Engineer at Keysight Technologies and recipient of the DesignCon Engineer of the Year Award.

デモ 2017-06-07

 
S-parameters: Signal Integrity Analysis in the Blink of an Eye 
This article discusses new concepts for serial link design and analysis as applied to physical layer test and measurement techniques. Novel test fixtures and signal integrity software tools will be discussed in real world applications in the form of design case studies.

記事 2017-05-30

 
Power Integrity Ecosystem by Heidi Barnes from Keysight  
This Power Integrity overview provides an understanding of power integrity, why it is important, how to design for it, and it teaches techniques for high-fidelity simulation, analysis and measurement.

デモ 2017-05-29

 
The Melting Trace Paradox 
Unlike other famous paradoxes such as the Zeno’s paradox, where Achilles and the Tortoise are involved, the melting trace paradox is one with a segment of copper trace and a current source.

記事 2017-05-24

 
N5990A Test Automation Software Platform - Data Sheet 
An efficient test strategy is a proven competitive advantage. Keysight's N5990A Test Automation Software Platform is a key element of winning strategies.

データシート 2017-05-04

PDF PDF 5.37 MB
Master 400G - Free Poster on 400 Gb/s Technologies 
This poster gives you a broad overview on all the new evolving standards for your path to 400Gb/s- in core fiber networks and data centers, for electrical and optical interconnects

ブローシャ 2017-05-03

 
Keysight Technologies to Present a Vision for 5G Evolution at WAMICON 2017  
Keysight experts will be at WAMICON 2017, an annual IEEE Wireless and Microwave Conference, to discuss everything from circuit-level modeling to system verification for general RF, microwave, millimeter wave for 4G, emerging 5G communications, and aerospace & defense.

プレス資料 2017-04-10

 
How to Design for Power Integrity: DC-DC Converter Modeling and Simulation 
This video describes how to create an accurate DC-DC Converter measurement based model (MBM) from just a few simple measurements.

使用法の説明ビデオ 2017-04-07

 
Download the 2017 Lightwave Catalog 
The catalog for high-performance optical T&M solutions provides information on test applications and test equipment for core fiber networks and data centers.

カタログ 2017-03-31

 
Ensuring High Signal Quality in PCIe Gen3 Channels 
This Signal Integrity Journal article written by Keysight engineer, Anil Kumar Pandey includes the challenges of maintaining transmission channel signal quality in today's PCIe Gen3 Channels.

記事 2017-03-14

 
Electronic Components Tolerance and Test Limits for In-Circuit Test - Technical Overview 
In order for all assembled components to function correctly, components are measured and analyzed electrically using the In-circuit tester to ensure its value and performance are optimal.

技術概要 2017-03-10

PDF PDF 634 KB
Accurate Statistical-Based DDR4 Margin Estimation Using SSN Induced Jitter Model 
This paper proposes a methodology, that improves the accuracy of DDR4 statistical simulation, by using the mask correction factor.

雑誌記事 2017-03-04

 
Method of Implementation (MOI) for USB Type-C Cable/Adapter Assembly High Speed Compliance Test 
Keysight Method of Implementation (MOI) for USB Type-C to Type-C Cable, Type-C to Legacy Cable, Type-C to Legacy Adapter Assembly High Speed Compliance Test Using Keysight M937xA PXIe Multiport VNA

アプリケーション・ノート 2017-02-24

PDF PDF 4.66 MB
Method of Implementation (MOI) for USB Type-C Cable Assembly Low Speed Compliance Test 
Keysight Method of Implementation (MOI) for USB Type-C to Type-C Cable Assembly Low Speed Compliance Test Using Keysight M937xA PXIe Multiport VNA

アプリケーション・ノート 2017-02-24

PDF PDF 2.91 MB
Heidi Barnes: DesignCon 2017 Engineer of the Year 
EDN Network's Martin Rowe interviews Heidi Barnes, DesignCon 2017 Engineer of the Year.

記事 2017-02-23

 
Signal and Power Integrity Products & Options Summary  
Signal and Power Integrity Products & Options Summary

セレクション・ガイド 2017-02-22

 
B4621B Bus Decoder for DDR2, DDR3, or DDR4 Debug and Validation - Data Sheet 
The B4621B protocol-decode software translates acquired signals into easily understood bus transactions showing associated data bursts for double- edge data-rate captures up to 2.5 Gb/s.

データシート 2017-02-21

PDF PDF 1.10 MB
Keysight Technologies Announces Heidi Barnes as the 2017 DesignCon Engineer of the Year 
Keysight is proud to announce that Heidi Barnes, a senior applications engineer for Keysight EEsof EDA's high-speed digital applications, was today announced as the 2017 DesignCon Engineer of the Year.

プレス資料 2017-02-02

 
End-to-End System-Level Simulations with Repeaters for PCIe Gen4: A How-To Guide 
DesignCon 2017 - The paper describes how to quickly and effectively evaluate the end-to-end link performance of a PCI-Express Gen-4 link involving a Root Complex, a Repeater, and an End Point.

アプリケーション・ノート 2017-01-31

PDF PDF 1.51 MB
Non-Destructive Analysis and EM Model Tuning of PCB Signal Traces using the Beatty Standard 
DesignCon 2017 - This paper shows how, using a simple resonant test structure like the Beatty standard on a PCB, it is possible to verify the as-manufactured parameters and tune the PCB simulation model.

アプリケーション・ノート 2017-01-31

PDF PDF 6.02 MB

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