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Design and Simulation of High-Speed Digital

Keysight tools provide views into the time and frequency domains, revealing the underlying problems and ensuring compliant designs. With Keysight, you'll achieve your best design.

Invest in your future and update your technical knowledge with our Tutorials in Signal Integrity Webcast series.

High Speed Digital Design Challenges

  • Analyzing complete chip-to-chip links by co-simulating individual components, each at its most appropriate level of abstraction: channel-, circuit- or physical-level
  • Importing backplane S-parameter models accurately into circuit and channel simulations, avoiding causality and passivity issues
  • Correlating measured and simulated data before using simulation to interpolate between measurement planes and extrapolating to virtual prototypes

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Keysight EEsof EDA Newsletter - Product and Application News 
Keep tabs on the latest product and application news and review the archives of the Keysight EEsof EDA Newsletter.

Bulletin d'information 2014-09-09

 
High Speed Digital Design and Simulation Videos on YouTube 
Keysight EEsof EDA's High Speed Digital Design and Simulation video playlist on YouTube.

Démonstration de base 2014-08-06

 
ADS Videos on YouTube 
Advanced Design System (ADS) Video Library playlist in Keysight EEsof EDA's Channel on YouTube

Démonstration de base 2014-08-06

 
Quick Start for Signal Integrity Design Using Advanced Design System (ADS) – Technical Overview 
This demo guide is a part of the high-speed digital design workflow for signal integrity engineers using Advanced Design System.

Présentation technique 2014-08-04

PDF PDF 3.82 MB
Modeling, Extraction and Verification of VCSEL Model for Optical IBIS AMI 
A technique of modeling and extraction of VCSEL devices for IBIS-AMI has been proposed.

Article 2014-08-04

PDF PDF 1.18 MB
Keysight EEsof EDA Software and Modular Solutions for Universities 
Keysight works in collaboration with universities to provide tools that enable education and research for the engineers of tomorrow. The brochure outlines available programs, software and hardware.

Brochure 2014-08-03

PDF PDF 1.44 MB
EDA Support Services 
Keysight Support Services for EDA Products offers customers several benefits otherwise not available. This service is designed to help you get the most out of your software purchases.

Brochure 2014-08-03

PDF PDF 465 KB
Analysis of Test Coupon Structures for the Extraction of High Frequency PCB Material Properties 
Exploration of the addition of Beatty series resonant impedance structures to improve the accuracy of extracting PCB material properties for the purpose of constructing 3D-EM simulations.

Notes d’application 2014-08-03

PDF PDF 2.19 MB
RF and Microwave Industry-Ready Student Certification Program 
This program confirms a student’s technical knowledge, design expertise, and hands-on measurement proficiency in the use of Keysight EEsof EDA software design tools and Keysight instruments.

Brochure 2014-08-03

PDF PDF 576 KB
An Innovative Simulation Workflow for Debugging High-Speed Digital Designs Using Jitter Separation 
This paper presents a new simulation workflow for jitter separation analysis.

Notes d’application 2014-08-03

Simulating High-Speed Serial Channels with IBIS-AMI Models 
This paper reviews some of the benefits and limitations of using IBIS models and introduces the new AMI extensions to the latest IBIS version 5.0 specification.

Notes d’application 2014-08-01

Controlled Impedance Line Designer in ADS 
The Controlled Impedance Line Designer in ADS enables signal integrity engineers to do pre-layout controlled impedance line design by optimizing the substrate stack up and the transmission line geometry.

Démonstration de base 2014-08-01

 
High Speed Digital Design with Advanced Design System 
This brochure describes 3 ADS suites of applicable simulators, libraries, and capabilities for signal integrity engineers.

Brochure 2014-07-31

PDF PDF 1.33 MB
New ADS DDR4 Compliance Test Bench for Solving the Simulation-Measurement Correlation Challenge 
Agilent introduces Advanced Design System DDR4 Compliance Test Bench, which enables a complete workflow for DDR4 engineers from simulation of a candidate design through measurement of the finished prototype. The solution is ideal for semiconductor companies developing DDR controller IP; those developing DRAM chips and DIMMs; and OEMs integrating the controller and DIMM into a system using PCB technology.

Dossier de presse 2014-06-30

 
Discovering ADS 
A collection of Keysight EEsof EDA ADS video demonstrations and tutorials

Démonstration de base 2014-03-20

 
Digital Design & Interconnect Standards - Brochure 
Brochure shows Keysight’s high-speed digital solution set , a range of essential tools, measurement and simulation—that will help cut through the challenges of gigabit digital designs.

Brochure 2014-02-20

PDF PDF 6.47 MB
ADS 2014 Dramatically Improves Design Productivity and Efficiency 
Agilent announces a powerful new version of Advanced Design System software, ADS 2014. Designed to dramatically improve design productivity and efficiency with new technologies and capabilities, ADS 2014 is the software's most significant ADS release to date.

Dossier de presse 2014-02-20

 
Touchstone v2.0 SI/PI S-Parameter Models for Simultaneous Switching Noise (SSN) Analysis of DDR4 
This paper presents a methodology to setup and analyze Simultaneous Switching Noise for DDR4 applications using Touchstone v2.0 models.

Article 2014-02-18

PDF PDF 8.07 MB
IBIS AMI Modeling of Retimer and Performance Analysis of Retimer based Active Serial Links 
This paper presents a novel retimer modeling approach based on IBIS-AMI to capture the performance of a retimer that operates up to 15 Gbps.

Article 2014-02-18

PDF PDF 1.78 MB
De-Mystifying the 28 Gb/s PCB Channel: Design to Measurement 
This paper demonstrates a design methodology for 28 Gb/s SERDES channels using Xilinx Virtex-7 Tx to show the required trade-offs that enable robust performance that is easy to verify with measurement.

Article 2014-02-18

PDF PDF 2.99 MB
Improving IBIS-AMI Model Accuracy: Model-to-Model and Model-to-Lab Correlation Case Studies 
This paper presents case studies for model-to-model & model-to-lab correlation methods & compares favorable/unfavorable factors for both methods. 10G, 11.5G and 23G SerDes data are used as examples.

Article 2014-02-18

PDF PDF 3.28 MB
Tips and Advanced Techniques for Characterizing a 28 Gb/s Transceiver 
This paper shows the right combination of measurement and simulation techniques, and how the previously existing barriers for using de-embedding have been eliminated.

Article 2014-02-18

PDF PDF 3.82 MB
Mechanism of Jitter Amplification in Clock Channels 
In this paper. jitter amplification in clock channels is analyzed analytically using the techniques developed in "Frequency domain analysis of jitter amplification in clock channels."

Article 2014-02-18

PDF PDF 671 KB
Sanjay Gangal of EDACafé interviews Colin Warwick on New SI and EM Products at Designcon 2014 
Sanjay Gangal, V.P. Sales & Marketing at EDACafé interviews Colin Warwick, Product Manager at Keysight Technologies, at Designcon 2014, .

Démonstration de base 2014-02-04

 
ADS Controlled Impedance Line Designer Solves Key Challenges in Designing Chip-to-Chip Links 
Agilent introduces Agilent EEsof EDA’s Controlled Impedance Line Designer. The software product quickly and accurately optimizes stack up and line geometry for multigigabit-per-second chip-to-chip links, using the most relevant metric.

Dossier de presse 2014-01-27

 

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