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Design and Simulation of High-Speed Digital

Keysight tools provide views into the time and frequency domains, revealing the underlying problems and ensuring compliant designs. With Keysight, you'll achieve your best design.

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High Speed Digital Design Challenges

  • Analyzing complete chip-to-chip links by co-simulating individual components, each at its most appropriate level of abstraction: channel-, circuit- or physical-level
  • Importing backplane S-parameter models accurately into circuit and channel simulations, avoiding causality and passivity issues
  • Correlating measured and simulated data before using simulation to interpolate between measurement planes and extrapolating to virtual prototypes

유튜브 동영상 보기 

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Keysight EEsof EDA Newsletter - Product and Application News 
Keep tabs on the latest product and application news and review the archives of the Keysight EEsof EDA Newsletter.

뉴스레터 2015-04-07

 
Keysight's ADS PCIe, USB Compliance Test Benches Solve Simulation-Measurement Correlation Challenge 
Keysight introduces the ADS PCIe and USB Compliance Test Benches, which enable a complete workflow for SerDes engineers, from simulation of a candidate design, through measurement of the finished prototype.

보도자료 2015-04-06

 
Improving IBIS-AMI Model Accuracy: Model-to-Model and Model-to-Lab Correlation Case Studies - Articl 
This DesignCon 2014 paper presents case studies for model-to-model & model-to-lab correlation methods & compares favorable/unfavorable factors for both methods. 10G, 11.5G and 23G SerDes data are used as examples.

기사 2015-04-02

PDF PDF 3.34 MB
Analysis of Test Coupon Structures for the Extraction of High Frequency PCB Material Properties - Wh 
Exploration of the addition of Beatty series resonant impedance structures to improve the accuracy of extracting PCB material properties for the purpose of constructing 3D-EM simulations.

어플리케이션 노트 2015-03-11

PDF PDF 1.73 MB
How to Do Fixture De-embedding to Match Signal Integrity Simulations to Measurements 
This video provides a quick overview of how fixture de-embedding from measurements, or embedding into simulations is a critical step for matching simulations to measurements for physical layer Tx to Rx channels.

사용방법 동영상 2015-03-10

 
Digital Design & Interconnect Standards - Brochure 
Brochure shows Agilent’s high-speed digital solution set , a range of essential tools, measurement and simulation—that will help cut through the challenges of gigabit digital designs.

브로셔 2015-03-09

PDF PDF 7.71 MB
Keysight Technologies to Demonstrate Latest EMC Design, Test Tools at EMCSI Symposium 
Keysight announces it will demonstrate and discuss the latest tools and techniques on 1) EMC design and testing, and 2) signal and power integrity at the EMCSI 2015 Symposium, Santa Clara Convention Center, Booth 618, March 17-19.

보도자료 2015-03-09

 
Keysight Technologies Exhibits High-Speed Digital Design and Test Solutions at DesignCon 
Keysight announces that it will exhibit its high-speed digital solutions at DesignCon 2015, Booth 725, Santa Clara Convention Center, Jan. 28-29.

보도자료 2015-01-12

 
ADS W2302EP/ET, W2500EP/ET, and W2312EP/ET Transient Convolution Products 
Advanced Design System W2302EP/ET Transient Convolution Element, W2500EP/ETTransient Convolution GT Option, and W2312EP/ET Transient Convolution Distributed Computing 8-pack

브로셔 2014-12-30

PDF PDF 1.16 MB
Keysight Donates $120 Mil. Gift of Software, Support and Training to Georgia Institute of Technology 
Keysight announces the largest in-kind software donation in its longstanding relationship with the Georgia Institute of Technology.

보도자료 2014-12-10

 
Keysight Receives Global Frost & Sullivan Award for Market Leadership in Instrumentation Software 
Keysight Technologies announces that Frost & Sullivan has recognized Keysight with the 2014 Global Frost & Sullivan Award for Market Leadership in Instrumentation Software for excellence in capturing the highest market revenue within its industry. The award is based on Frost & Sullivan's recent analysis of the instrumentation software market.

보도자료 2014-12-08

 
Keysight to Demonstrate Hardware and Electronic Design Automation Software Solutions at EPEPS 2014 
Keysight Technologies announces it will demonstrate its latest hardware and electronic design automation software solution releases at EPEPS 2014, Embassy Suites Portland, Portland, Oregon, Oct. 26-29. Keysight is a silver-level sponsor of the event.

보도자료 2014-10-23

 
Design Challenges in DDR4 - The Keysight DDR Bus Simulator 
This video is about design challenges in DDR4 and in particular the DDR Bus Simulator, which is a new Keysight EEsof EDA simulation tool for DDR4 and beyond.

기본 데모 2014-10-16

 
Keysight Technologies Demonstrates Simulation, Debug, Validation and Test Solutions at MemCon 
Keysight announces it will demonstrate solutions that provide simulation, debug, validation and test for the fastest speed memory designs at MemCon, Santa Clara Convention Center, Booth102, Santa Clara, Calif., Oct. 15.

보도자료 2014-10-13

 
DDR Compliance Integration with Advanced Design System 
The W2351EP DDR4 Compliance Test Bench helps solve the problem of simulation-measurement correlation.

기본 데모 2014-10-03

 
DDR Memory Test Solutions Overview 
This video provides an overview of Keysight's DDR Memory test solutions, from simulation, transmitter compliance, protocol, and probing solutions.

기본 데모 2014-10-03

 
Keysight Introduces DDR Bus Simulator to Solve the Bit-Error-Rate Contour Simulation Challenge 
Keysight Technologies introduces the DDR Bus Simulator; the industry’s first tool to generate accurate Bit-Error-Rate (BER) contours for the JEDEC DDR memory bus specification.

보도자료 2014-09-30

 
ADS Videos on YouTube 
Advanced Design System (ADS) Video Library playlist in Keysight EEsof EDA's Channel on YouTube

기본 데모 2014-08-06

 
High Speed Digital Design and Simulation Videos on YouTube 
Keysight EEsof EDA's High Speed Digital Design and Simulation video playlist on YouTube.

기본 데모 2014-08-06

 
Mechanism of Jitter Amplification in Clock Channels 
In this paper. jitter amplification in clock channels is analyzed analytically using the techniques developed in "Frequency domain analysis of jitter amplification in clock channels."

기사 2014-08-04

PDF PDF 715 KB
Touchstone v2.0 SI/PI S-Parameter Models for Simultaneous Switching Noise (SSN) Analysis of DDR4 
This article reprint presents a methodology to setup and analyze Simultaneous Switching Noise for DDR4 applications using Touchstone v2.0 models.

기사 2014-08-04

PDF PDF 8.20 MB
Modeling, Extraction and Verification of VCSEL Model for Optical IBIS AMI 
A technique of modeling and extraction of VCSEL devices for IBIS-AMI has been proposed.

기사 2014-08-04

PDF PDF 1.18 MB
De-Mystifying the 28 Gb/s PCB Channel: Design to Measurement 
This paper demonstrates a design methodology for 28 Gb/s SERDES channels using Xilinx Virtex-7 Tx to show the required trade-offs that enable robust performance that is easy to verify with measurement.

기사 2014-08-04

PDF PDF 2.84 MB
Quick Start for Signal Integrity Design Using Advanced Design System (ADS) – Technical Overview 
This demo guide is a part of the high-speed digital design workflow for signal integrity engineers using Advanced Design System.

기술 개요 2014-08-04

PDF PDF 3.82 MB
IBIS AMI Modeling of Retimer and Performance Analysis of Retimer based Active Serial Links 
This paper presents a novel retimer modeling approach based on IBIS-AMI to capture the performance of a retimer that operates up to 15 Gbps.

기사 2014-08-04

PDF PDF 1.88 MB

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