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PCI Express® Design & Test

Peripheral Component Interconnect Express, officially abbreviated as PCIe® or PCI Express®, is a computer expansion bus standard designed to replace the older bus standards such as PCI. 

PCIe 2.0 doubles the transfer rate of PCIe 1.0 to 5 GT/s and the per-lane throughput rises from 250 MB/s to 500 MB/s.

PCIe 3.0 has a 8 GT/s bit rate which is backward compatible with PCIe 2.0 and effectively delivers double the PCIe 2.0 bandwidth. 

Regardless of the PCIe generation design challenges you are facing, Keysight offers a complete solution set from electrical to protocol. Work with Keysight and gain insights for your best design.

See measurement solution examples to discover specific solutions for your PCIe needs

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Quick Start for Signal Integrity Design Using Advanced Design System (ADS) – Technical Overview 
This demo guide is a part of the high-speed digital design workflow for signal integrity engineers using Advanced Design System.

Technical Overview 2014-08-04

PDF PDF 3.82 MB
Strategies for Debugging Serial Bus Systems with Infiniium Oscilloscopes – Application Note 
This application note discusses the challenges associated with and new solutions for debugging serial bus designs including PCI-Express Generation 1, Inter Integrated Circuit (I2C), Serial Peripheral Interface (SPI), or Universal Serial Bus (USB)

Application Note 2014-07-31

U4301A PCI Express® 3.0 Analyzer Module - Data Sheet 
Keysight's U4301A PCI Express® 3.0 analyzer module is a protocol analyzer supporting all PCIe applications from Gen1 - Gen3 and speeds from 2.5 GT/s (Gen1) - PCI 8 GT/s (Gen3), link widths X1-X16.

Data Sheet 2013-09-04

N5393A PCI Express® 3.0 (Gen3) Software for Infiniium Oscilloscopes - Data Sheet 
Keysight Technologies N5393C PCI Express electrical performance validation and compliance software provides you with a fast and easy way to verify and debug your PCI Express designs for add-in cards and motherboard systems. The PCI Express electrical test software allows you to automatically execute PCI Express electrical checklist tests, and it displays the results in a flexible report format. In addition to the measurement data, the report provides a margin analysis that shows how closely your device passed or failed each test.

Data Sheet 2013-05-07

PCI Express® Compliance Test - Test Solution Overview Using the ENA Option TDR 
This describes how to make measurements of PCI Express® Compliance Testing by using the Keysight E5071C ENA Option TDR.

Technical Overview 2013-04-24

PDF PDF 3.29 MB
Keysight Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test 
Keysight Method of Implementation (MOI) for PCI Express 3.0 PCB Differential Trace Impedance Test Using Keysight E5071C ENA Network Analyzer Option TDR

Application Note 2012-10-16

PDF PDF 1.62 MB
Crossing the Digital-Analog Divide - White Paper 
This white paper helps to better understand how to cope with the physical nature of signals that we might prefer to think of as bits, nibbles and bytes, let's start with an ideal digital waveform.

Application Note 2012-05-02

PDF PDF 6.46 MB
PCI Express Design and Test From Electrical to Protocol - Brochure 
Keysight's PCI EXPRESS® brochure will explain basic differences between Gen1, Gen2, and Gen3 as well as the full breadth of Keysight's PCIe solutions.

Brochure 2012-01-17

PDF PDF 1.26 MB
How to Pass Receiver Test According to PCI Express® 3.0 CEM Specification - Application Brief 
This paper provides insight into the calibration method and tests, as well as the tools available. The biggest change between PCIe 2.x and rev. 3.0 is that RX test on cards will now be normative.

Application Note 2011-11-30

E2960B Series for PCI Express 2.0 - Data Sheet 
The Protocol Test Series encompasses the industry's most complete and integrated x1 through x16 protocol analyzer and LTSSM (Link Training and Status State Machine) exerciser for superior midbus and solid slot probing. This data sheet supports Windows 7.

Data Sheet 2011-11-03

PCI Express Transmitter Electrical Validation and Compliance Testing - Application Note 
This application note is intended for digital designers and developers validating electrical performance of PCI Express-based designs and working toward electrical compliance of PCI Express products.

Application Note 2011-10-28

PDF PDF 1.01 MB
Advanced Techniques for PCIe 3.0 Receiver Testing-Paper - Application Note 
Advanced Techniques for PCIe 3.0 Receiver Testing-Paper

Application Note 2011-09-01

PDF PDF 2.20 MB
Accurate Calibration of Receiver Stress Test Signals for PCI Express® Rev. 3.0 - Application Note 
This paper describes the calibration of the receiver-stress signal according to the base specification of PCIe3. The calibration of the RX test signal is different from PCIe 2.0.

Application Note 2011-06-22

Agilent Technologies' Introduces Complete Test Solution for PCI Express® 3.0  

Press Materials 2010-02-01

DOC DOC 67 KB
Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P - Application Note 
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.

Application Note 2009-03-24

PDF PDF 606 KB
PCI Express® Revision 2 - Receiver Testing With J-BERT N4903A and 81150A Pulse - Application Note 
Receiver Testing With J-BERT N4903A and 81150A Pulse

Application Note 2008-12-03

PDF PDF 1000 KB
Upgrade to PCI Express 2.0© Receiver Test - Application Note 
The 15431A is a filter set for the 81150A. It generates the random jitter profile for testing PCI Express 2.0 receivers, to be used in conjunction with the N4903A. This fact sheet explains the upgrade.

Application Note 2008-10-24

PDF PDF 348 KB
Benefits of using PCI Express 2.0. - Application Note 
An overview of the main features and benefits of using PCI Express 2.0

Application Note 2008-10-17

PDF PDF 764 KB
Jitter Solutions for Telecom, Enterprise, and Digital Designs - Brochure 
Complete solutions for characterization and test of jitter in high-speed digital transmission systems, high-speed I/O connections, and buses.

Brochure 2008-06-25

PDF PDF 3.49 MB
Precision Waveform Analysis for High-Speed Digital Communications Technical Overview 
his document will discuss the Keysight 86108A precision waveform analyzer plug-in module with the Keysight 86100C DCA-J sampling oscilloscope mainframe for accurate analysis of high-speed digital communications signals.

Application Note 2008-04-17

Integrated Debugging-A New Approach to Troubleshooting Your Designs with Real-Time Oscilloscopes 
Traditional debugging can be time consuming and inefficient. With Keysight Infiniium oscilloscopes, “integrated debugging” is a reality, and it leads you directly to the root cause of problems.

Application Note 2008-01-30

Keysight E2960B Series for PCI Express 1.0 & 2.0 - Brochure 
Providing customers with the fastest time to insight with an integrated suite of analyzer and exerciser tools.

Brochure 2007-05-15

PDF PDF 326 KB
BERT Application Brochure 
Answers for your multi-gigabit test challenges

Brochure 2007-01-15

PDF PDF 1.37 MB
PCI Express Performance Measurements 
The serial point-to-point PCI Express technology supports up to 4 GB/s bandwidth per direction.

Application Note 2006-09-15

PDF PDF 656 KB
Automated PCI Express Receiver Compliance Test and Characterization with N5990A - Application Note 
This product note shows how to use the test automation software platform to verify and debug your PCI Express bus designs. As an example, a multi-lane add-in card is used.

Application Note 2006-08-29

PDF PDF 444 KB

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