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PCI Express® (PCIe) Design & Test

Peripheral Component Interconnect Express, officially abbreviated as PCIe® or PCI Express®, is a computer expansion bus standard designed to replace the older bus standards such as PCI. 

PCIe 2.0 doubles the transfer rate of PCIe 1.0 to 5 GT/s and the per-lane throughput rises from 250 MB/s to 500 MB/s.

PCIe 3.0 has a 8 GT/s bit rate which is backward compatible with PCIe 2.0 and effectively delivers double the PCIe 2.0 bandwidth. 

PCIe 4.0 at 16 GT/s doubles data rates again, requiring extensive testing and validation to enable speed, while maintaining backward compatibility with earlier generations.

Regardless of the generation of PCIe design you are testing or the PCI Express design challenges you are facing, Keysight offers a complete solution set from design to test. Work with Keysight and gain insights for you best PCIe design.


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See measurement solution examples to discover specific solutions for your PCIe needs

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Crosstalk and Jitter, From Simulation to Test Seminar 
October 12, 2017; Santa Clara, CA

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Electrical Performance of Electronic Packaging And Systems (EPEPS) 2017 
San Jose, CA; October 16 - 17, 2017

Salon professionnel

 
Mastering Signal Integrity and Power Integrity Design Seminar Canada 
Various Canadian dates and locations in 2017

Séminaire

 
Mastering Signal Integrity and Power Integrity Design Seminar 
Various dates and locations in 2017

Séminaire

 
Advanced Measurement Seminar 2017 
Various dates and locations in 2017

Séminaire

 
USB Type-C Physical Layer Design Webcast 
Live broadcast November 9, 2017; 10am PT / 1pm ET

Webcast - enregistré

 
Test with Data Analytics to Enable Faster Time to Market Webcast 
Original broadcast March 8, 2017

Webcast - enregistré

 
Thermal Effects, Power Integrity, and Your PCB 
Original broadcast July 27, 2017

Webcast - enregistré

 
Addressing Crosstalk Challenges from Simulation to Board Debug Webcast 
Original broadcast June 28, 2017

Webcast - enregistré

 
Keysight Test-Drive 2017 
Various dates and locations in 2017

Séminaire

 
Debugging DC Voltage Lines Using an Oscilloscope Webcast 
Original broadcast June 7, 2017

Webcast - enregistré

 
Selecting the Right Oscilloscope Probe Webcast 
Original broadcast May 17, 2017

Webcast - enregistré

 
Lightwave/400G Symposium 2017  
Santa Clara, CA; June 8, 2017

Séminaire

 
DDR4/LPDDR4 Testing – Best Practices to Get to Market Faster Webcast 
Original broadcast April 20, 2017

Webcast - enregistré

 
Unraveling the Mysteries of Everyday Oscilloscope Measurements Webcast 
Original broadcast April 25 , 2017

Webcast - enregistré

 
Optical Signal Measurements using a Real-time Oscilloscope Webcast 
Live broadcast May 11, 2017; 10am PT / 1pm ET

Webcast

 
PCIe 4.0 Physical Layer Transmitter and Receiver Testing Webcast 
Live broadcast April 5, 2017

Webcast

 
Demystifying Vias in High-Speed PCB Design Webcast 
Original broadcast March 23, 2017

Webcast - enregistré

 
Characterizing and Modeling Switch Mode Power Supplies Webcast 
Original broadcast March 15, 2017

Webcast - enregistré

 
Extreme Oscilloscope Probing Challenges and Solutions Webcast 
Original broadcast February 16, 2017

Webcast - enregistré

 
USB Type-C Design Implementations – Overcoming Test Challenges 
Original broadcast February 21, 2017

Webcast - enregistré

 
Analyze and Optimize 32- to 56- Gbps Serial Link Channels Webcast 
Original broadcast January 26, 2017

Webcast - enregistré

 
Making Accurate Power Integrity Measurements Using an Oscilloscope 
Original broadcast January 12, 2017

Webcast - enregistré

 
Overcoming 400G Test Challenges using PAM-4 Webcast 
Original broadcast December 13, 2016

Webcast - enregistré

 
Improve the Efficiency of RF and Microwave Interference Analysis with RTSA Webcast 
Live broadcast November 29, 2016; 10am PT / 1pm ET

Webcast

 

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