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PCI Express® (PCIe) Design & Test

Peripheral Component Interconnect Express, officially abbreviated as PCIe® or PCI Express®, is a computer expansion bus standard designed to replace the older bus standards such as PCI. 

PCIe 2.0 doubles the transfer rate of PCIe 1.0 to 5 GT/s and the per-lane throughput rises from 250 MB/s to 500 MB/s.

PCIe 3.0 has a 8 GT/s bit rate which is backward compatible with PCIe 2.0 and effectively delivers double the PCIe 2.0 bandwidth. 

Regardless of the generation of PCIe design you are testing or the PCI Express design challenges you are facing, Keysight offers a complete solution set from design to test. Work with Keysight and gain insights for you best PCIe design.

See measurement solution examples to discover specific solutions for your PCIe needs

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DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD

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DesignCon 2015 
Download Keysight's papers from Technical Conference; Jan 27-29, 2015; Santa Clara Convention Center

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Digital & Photonics - Webcast Library 
Live and on-demand webcasts

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Fundamentals of PCIe® 3.0 EQ Test and Outlook on PCIe 16GT/s RX Test Webcast 
Original broadcast September 30, 2015

Webcast - recorded

 
Introducing Keysight’s New AWG for Optical and High Speed Digital Test Webcast 
Original broadcast October 8, 2015

Webcast - recorded

 
Introducing the New Infiniium V-Series High-Performance Oscilloscope Webcast 
Original broadcast April 14, 2015

Webcast - recorded

 
Jitter Measurements and Real-Time Eye Analysis Using an Oscilloscope Webcast 
Original broadcast May 28, 2015

Webcast - recorded

 
MIPI M-PHY, D-PHY and C-PHY Receiver Testing – Today and Tomorrow 
Original broadcast October 21, 2014

Webcast - recorded

 
MIPI Physical Layer Standards and Receiver Test Solutions Webcast 
Original broadcast May 13, 2015

Webcast - recorded

 
MIPI – Overcome Test Challenges to Ensure Interoperability for your PHY Webcast 
Original broadcast June 23, 2015

Webcast - recorded

 
Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

Webcast - recorded

 
Optimizing 100G Ethernet Electrical Measurements Webcast 
Original broadcast December 10, 2014

Webcast - recorded

 
PAM-4 Transmitter and Receiver Design Characterization Solutions Webcast 
Original broadcast May 21, 2015

Webcast - recorded

 
Power Integrity Measurements Webcast – Choosing the Right Tools 
Live broadcast January 6, 2016; 10am PT/1pm ET

Webcast - recorded

 
Supporting PAM-4 Optical Link Development Webcast 
Original broadcast December 10, 2015

Webcast - recorded

 
Ten Oscilloscope Innovations You’ll Want that Didn’t Exist Three Years Ago 
Original broadcast November 12, 2014

Webcast - recorded

 
The Type-C Revolution Demands Design and Test Innovations Webcast 
Live broadcast February 25, 2016; 10am PT / 1pm ET

Webcast

 
Thunderbolt over Type-C – Overcoming Test Challenges Webcast 
Live broadcast February 24, 2016; 10am PT / 1pm ET

Webcast

 
USB 3.1 - Gen2 10Gbps Receiver Test Challenges Webcast 
Original broadcast March 11, 2015

Webcast - recorded

 
USB 3.1 Receiver Testing including devices using Type-C Webcast 
Live broadcast ,February 3 2016; 10am PT / 1pm ET

Webcast

 
USB Type-C Connector Webcast: A Validation Engineer's Dream! 
Live broadcast February 17, 2016; 10am PT / 1pm ET

Webcast