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PCI Express® (PCIe) Design & Test

Peripheral Component Interconnect Express, officially abbreviated as PCIe® or PCI Express®, is a computer expansion bus standard designed to replace the older bus standards such as PCI. 

PCIe 2.0 doubles the transfer rate of PCIe 1.0 to 5 GT/s and the per-lane throughput rises from 250 MB/s to 500 MB/s.

PCIe 3.0 has a 8 GT/s bit rate which is backward compatible with PCIe 2.0 and effectively delivers double the PCIe 2.0 bandwidth. 

Regardless of the generation of PCIe design you are testing or the PCI Express design challenges you are facing, Keysight offers a complete solution set from design to test. Work with Keysight and gain insights for you best PCIe design.

See measurement solution examples to discover specific solutions for your PCIe needs

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Keysight eventos en España 
Bienvenido a la página de eventos organizados por Keysight en España.


DDR4/LPDDR4 – Overcome the Barriers of Testing and Probing High-Speed Memory Systems Webcast 
Original broadcast April 23, 2015

Webcast - recorded

DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD


DesignCon 2015 
Download Keysight's papers from Technical Conference; Jan 27-29, 2015; Santa Clara Convention Center


DisplayPort 1.3 – PHY Layer Test Requirements Webcast 
Live broadcast May 27, 2015; 10am PT / 1pm ET


Electronic Measurement Events in Europe, Middle East & Africa 
Electronic Measurement events in Europe, the Middle East, and Africa - seminars, trade shows, user group meetings, webcasts, tutorials and conferences.


Introducing the New Infiniium V-Series High-Performance Oscilloscope Webcast 
Original broadcast April 14, 2015

Webcast - recorded

Jitter Measurements and Real-Time Eye Analysis Using an Oscilloscope Webcast 
Original broadcast May 28, 2015

Webcast - recorded

Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

Webcast - recorded