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PCIe 2.0/3.0, PCI Express® Design & Test Information Resource Center

Peripheral Component Interconnect Express, officially abbreviated as PCIe® or PCI Express®, is a computer expansion bus standard designed to replace the older bus standards such as PCI. 

PCIe 2.0 doubles the transfer rate of PCIe 1.0 to 5 GT/s and the per-lane throughput rises from 250 MB/s to 500 MB/s.

PCIe 3.0 has a 8 GT/s bit rate which is backward compatible with PCIe 2.0 and effectively delivers double the PCIe 2.0 bandwidth. 

Regardless of the PCIe generation design challenges you are facing, Keysight offers a complete solution set from electrical to protocol. Work with Keysight and achieve your best design.

See Measurement Solution Examples: PCIe 3.0 Transmitter Test    PCIe 3.0 Receiver Test

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10 Oscilloscope Innovations You’ll Want that Didn’t Exist 3 Years Ago 
Live broadcast November 12, 2014; 10am PT / 1pm ET

Webcast

 
Advanced Oscilloscope Measurements – Utilizing Math and Measurements Capability 
Original broadcast June 3, 2014

Webcast - recorded

 
Automate Multilane Gigabit Oscilloscope Testing with Switch Matrix Webcast 
Original broadcast November 20, 2013

Webcast - recorded

 
DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD

Tradeshow

 
Do you use Oscilloscopes in the 1 GHz to 6 GHz bandwidth range? 
Original broadcast June 24, 2014

Webcast - recorded

 
Electronic Measurement Events in Europe, Middle East & Africa 
Electronic Measurement events in Europe, the Middle East, and Africa - seminars, trade shows, user group meetings, webcasts, tutorials and conferences.

Seminar

 
Fixture De-embedding Techniques for 28 Gb/s Transmitter Measurements Webcast 
Live broadcast January 23, 2014; 10am PT/1pm ET/19:00 CET

Webcast - recorded

 
Keeping up with 10G USB 3.1 Physical Layer Test Challenges Webcast 
Original broadcast January 15, 2014

Webcast - recorded

 
Measuring Power Rail Signal Integrity with Oscilloscopes Webcast 
Live broadcast Ocotber 29, 2014; 10am PT / 1pm ET

Webcast

 
PAM-4 Solutions for Transmit and Receive Design Characterization 
Live broadcast October 23, 2014; 10am PT / 1pm ET

Webcast

 
Physical Layer design challenges for PCI Express® 3.0 and 2.0 designs 
You will learn advanced techniques for PCI Express phy-layer validation covering the latest PCIe 3.0 specification requirements as well as practical extensions to PCIe 2.0 and 1.1 designs. This seminar analyzes transmitter and receiver performance.

Webcast - recorded

 
See the New Infiniium S-Series Oscilloscope in this 30 Minute Webcast 
Live broadcast Ocotber 22, 2014; 10am PT / 1pm ET

Webcast

 
Surmounting the Challenges of 16 Gigabit Operation with PCI Express Webcast 
Original broadcast Ocotber 1, 2014

Webcast - recorded

 
Switch Mode Power Supply Measurements using Oscilloscopes 
Live broadcast November 18, 2014; 10am PT / 1pm ET

Webcast