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PCI Express® (PCIe) Design & Test

Peripheral Component Interconnect Express, officially abbreviated as PCIe® or PCI Express®, is a computer expansion bus standard designed to replace the older bus standards such as PCI. 

PCIe 2.0 doubles the transfer rate of PCIe 1.0 to 5 GT/s and the per-lane throughput rises from 250 MB/s to 500 MB/s.

PCIe 3.0 has a 8 GT/s bit rate which is backward compatible with PCIe 2.0 and effectively delivers double the PCIe 2.0 bandwidth. 

PCIe 4.0 at 16 GT/s doubles data rates again, requiring extensive testing and validation to enable speed, while maintaining backward compatibility with earlier generations.

Regardless of the generation of PCIe design you are testing or the PCI Express design challenges you are facing, Keysight offers a complete solution set from design to test. Work with Keysight and gain insights for you best PCIe design.


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See measurement solution examples to discover specific solutions for your PCIe needs

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USB Type-C Physical Layer Design Webcast 
Live broadcast November 9, 2017; 10am PT / 1pm ET

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Test with Data Analytics to Enable Faster Time to Market Webcast 
Original broadcast March 8, 2017

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Thermal Effects, Power Integrity, and Your PCB 
Original broadcast July 27, 2017

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Addressing Crosstalk Challenges from Simulation to Board Debug Webcast 
Original broadcast June 28, 2017

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Debugging DC Voltage Lines Using an Oscilloscope Webcast 
Original broadcast June 7, 2017

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Selecting the Right Oscilloscope Probe Webcast 
Original broadcast May 17, 2017

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Unraveling the Mysteries of Everyday Oscilloscope Measurements Webcast 
Original broadcast April 25 , 2017

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Optical Signal Measurements using a Real-time Oscilloscope Webcast 
Live broadcast May 11, 2017; 10am PT / 1pm ET

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DDR4/LPDDR4 Testing – Best Practices to Get to Market Faster Webcast 
Original broadcast April 20, 2017

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PCIe 4.0 Physical Layer Transmitter and Receiver Testing Webcast 
Live broadcast April 5, 2017

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Demystifying Vias in High-Speed PCB Design Webcast 
Original broadcast March 23, 2017

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Characterizing and Modeling Switch Mode Power Supplies Webcast 
Original broadcast March 15, 2017

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USB Type-C Design Implementations – Overcoming Test Challenges 
Original broadcast February 21, 2017

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Extreme Oscilloscope Probing Challenges and Solutions Webcast 
Original broadcast February 16, 2017

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Analyze and Optimize 32- to 56- Gbps Serial Link Channels Webcast 
Original broadcast January 26, 2017

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Making Accurate Power Integrity Measurements Using an Oscilloscope 
Original broadcast January 12, 2017

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Overcoming 400G Test Challenges using PAM-4 Webcast 
Original broadcast December 13, 2016

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Improve the Efficiency of RF and Microwave Interference Analysis with RTSA Webcast 
Live broadcast November 29, 2016; 10am PT / 1pm ET

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PCI Express®: Techniques for 16 Gbit Deployment Webcast 
Original broadcast September 27, 2016

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What You Need to Know About Capturing Elusive Glitches and Signals Webcast 
Live broadcast September 15, 2016; 10am PT / 1pm ET

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PCI Express 3.0 Receiver test of ASICs- how to face this challenge - webcast 
When PCIe 3.0 was generated, it was a goal to re-use the existing passive infrastructure - the channels. With nearly double the signal rate (8Gb/s vs. 5Gb/s), the error free transmission now heavily depends on the RX. Therefore it is now normati...

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Switch Mode Power Supply Measurements and Analysis using Oscilloscopes 
Original broadcast November 18, 2014

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MIPI M-PHY, D-PHY and C-PHY Receiver Testing – Today and Tomorrow 
Original broadcast October 21, 2014

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Jitter Measurements and Real-Time Eye Analysis Using an Oscilloscope Webcast 
Original broadcast May 28, 2015

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Introducing the New Infiniium V-Series High-Performance Oscilloscope Webcast 
Original broadcast April 14, 2015

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