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DDR Memory Design & Test

Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) is implemented in several forms today – the original DDR (also called DDR1), DDR2 which improved performance and lowered power consumption, DDR3 with even better performance, and low-power DDR (LPDDR), that is targeted for mobile devices.

Keysight is an active member of JEDEC, with consistent participation in workshops and specification issues. These resources you find here will provide you with an overview of DDR design, understand the latest measurement techniques, and illustrate design and debug approaches.

Use the matrix below to discover specific solutions for your DDR needs.

  Simulation Parametric Test (Oscilloscope) Functional Validation (Logic Analyzers) Probing Solutions
DDR2 W2302EP                N5413B                B4622B       W2633B
DDR3 W2302EP                U7231B                B4622B       W3631A
DDR4   Planned                N6462A                B4622B  
LPDDR2 LPDDR2                N5413B                B4622B  
LPDDR3   Planned                U7231B                B4622B  
GDDRS   Planned                U7245A    
UFS                  N8818A    

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Keysight eventos en España 
Bienvenido a la página de eventos organizados por Keysight en España.

Seminar

 
Accelerate DDR4/LPDDR3 Memory Debug with Bus level Signal Integrity Insight Webcast 
Original broadcast March 4, 2014

Webcast - recorded

 
Accelerate FPGA Debug by Applying Latest Tools and Methods Webcast 
Original broadcast June 10, 2014

Webcast - recorded

 
Best practices in implementing boundary scan on limited access boards 
Live broadcast December 18, 2014; 9am PT / 12pm ET

Webcast

 
Boundary Scan for Testing On-Board DDRs Webcast 
Original broadcast October 22, 2013

Webcast - recorded

 
Boundary Scan Webcast Series 
Live and on-demand webcasts

Webcast

 
Common DFT guidelines for implementing boundary scan on limited access boards webcast 
Original broadcast September 11, 2014

Webcast - recorded

 
DDR memory Characterization Using a Mixed Signal Oscilloscope Webcast 
Original broadcast October 16, 2013

Webcast - recorded

 
DesignCon 2014 
Jan 28-31, 2014; Santa Clara Convention Center Download papers presented, order the AEF DVD

Tradeshow

 
Electronic Measurement Events in Europe, Middle East & Africa 
Electronic Measurement events in Europe, the Middle East, and Africa - seminars, trade shows, user group meetings, webcasts, tutorials and conferences.

Seminar

 
Embedded testing of Intel Haswell and Broadwell chipsets on limited access client boards webcast 
Live broadcast November 13, 2014; 9am PT / 12pm ET

Webcast

 
EMI/EMC Analysis for High-Speed Digital Design Webcast 
Live broadcast July 24, 2014; 10am PT/1pm ET/19:00 CET

Webcast

 
Extending boundary scan tests to improve test coverage of limited access boards webcast 
Live broadcast September 25, 2014; 9am PT / 12pm ET

Webcast

 
Fixture De-embedding Techniques for 28 Gb/s Transmitter Measurements Webcast 
Live broadcast January 23, 2014; 10am PT/1pm ET/19:00 CET

Webcast - recorded

 
Fixturing and Fixture Removal for Multiport Devices with Non-Standard RF Interfaces Webcast 
Original broadcast March 11, 2014

Webcast - recorded

 
How to Achieve Compliance to the New 1E-16 BER Contour Spec in DDR4 
Live broadcast November 6, 2014; 10am PT/1pm ET

Webcast

 
How to Optimize Your SerDes Design During the Pre-layout Phase Webcast 
Live broadcast September 25, 2014; 10am PT / 1pm ET

Webcast

 
Introduction to the Keysight x1149 Boundary Scan Analyzer Webcast 
Original broadcast August 26, 2014; 9am PT / 12pm ET

Webcast - recorded

 
Maximizing test coverage of multiple limited access boards by linking multiple boundary scan chains 
Live broadcast October 9, 2014; 9am PT / 12pm ET

Webcast

 
New Calibration Method Simplifies Measurements of Fixtured Devices Webcast 
Original broadcast July 29, 2014

Webcast - recorded

 
Next generation BERT Ensures Signal Integrity in High-speed Digital Designs Webcast 
Original broadcast January 21, 2014

Webcast - recorded

 
Simulation-Measurement Workflow for DDR Compliance Webcast 
Original broadcast March 27, 2014

Webcast - recorded

 
Simultaneous Switching Noise Analysis in DDR4 applications using Power-Aware IBIS Models Webcast 
Original broadcast May 22, 2014

Webcast - recorded

 
Testing DDR on limited access boards using boundary scan silicon nails 
Live broadcast October 30, 2014; 9am PT / 12pm ET

Webcast

 
Testing limited access SSD boards with boundary scan and external instruments webcast 
Live broadcast December 4, 2014; 9am PT / 12pm ET

Webcast

 

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